SI3201-GSR Silicon Laboratories Inc, SI3201-GSR Datasheet - Page 31
SI3201-GSR
Manufacturer Part Number
SI3201-GSR
Description
SLIC 3.3V/3.3V/3.3V/5V/5V/5V
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI3201-GSR.pdf
(122 pages)
Specifications of SI3201-GSR
Lead Free Status / Rohs Status
Compliant
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Power Alarm Threshold, Q1 & Q2
Power Alarm Threshold, Q3 & Q4
Power Alarm Threshold, Q5 & Q6
*Note: The ProSLIC device uses registers that are both directly and indirectly mapped. A “direct” register is one that is
Power Alarm Interrupt Pending
Power Alarm Interrupt Enable
Thermal LPF Pole, Q1 & Q2
Thermal LPF Pole, Q3 & Q4
Thermal LPF Pole, Q5 & Q6
Line Power Monitor Output
Automatic/Manual Detect
Power Monitor Pointer
mapped directly. An “indirect” register is one that is accessed using the indirect access registers (direct registers 28
through 31).
Power Alarm
Parameter
Table 24. Associated Power Monitoring and Power Fault Registers
See equation in “2.1.5. Power
Monitoring and Line Fault Detec-
tion”
See equation in “2.1.5. Power
Monitoring and Line Fault Detec-
tion”
See equation in “2.1.5. Power
Monitoring and Line Fault Detec-
tion”
spond to Q1 to Q6,
spond to Q1 to Q6,
to Q6, respectively
0 to 5 points to Q1
0 to 7.8 W for Q1,
0 to 0.9 W for Q3,
0 = manual mode
state upon power
Bits 2 to 7 corre-
Bits 2 to 7 corre-
1 = enter Open
Description/
respectively
respectively
Q2, Q5, Q6
0 to 7.8 W
0 to 0.9 W
0 to 7.8 W
Range
alarm
Q4
Rev. 1.0
Resolution
30.4 mW
3.62 mW
30.4 mW
3.62 mW
30.4 mW
N/A
N/A
N/A
N/A
where n = 1 to 6
where n = 1 to 6
PWROM[7:0]
PWRMP[2:0]
QnAP[n+1],
QnAE[n+1],
PPT12[7:0]
PPT34[7:0]
PPT56[7:0]
NQ12[7:0]
NQ34[7:0]
NQ56[7:0]
Register
AOPN
Bits
Indirect Register 19
Indirect Register 20
Indirect Register 21
Indirect Register 24
Indirect Register 25
Indirect Register 26
Direct Register 76
Direct Register 77
Direct Register 19
Direct Register 22
Direct Register 67
Si3216
Location*
31
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