L80227-LEADFREE LSI, L80227-LEADFREE Datasheet - Page 54
L80227-LEADFREE
Manufacturer Part Number
L80227-LEADFREE
Description
Manufacturer
LSI
Datasheet
1.L80227-LEADFREE.pdf
(140 pages)
Specifications of L80227-LEADFREE
Lead Free Status / Rohs Status
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2.7.3 10/100 Mbits/s Indication
2.8 Jabber
2.9 Reset
2-36
The channel 10/100 Mbits/s speed can be monitored through the
SPD_DET bit in the MI serial port Channel Status Output register.
In the MI serial port Configuration register, set the LED function select
bits (LED_DEF[1:0]) so that the 10/100 speed condition is indicated at
the PLED0n output. Set the PLED_2[1:0]n bits in the same register to
0b11 (normal). When the PLED0n pin is programmed to be a speed
detect output, it is asserted LOW when the device is configured for 100
Mbits/s operation. The PLED0n output has both pullup and pulldown
driver transistors and a weak pullup resistor, so it can drive an LED from
either V
See
program the LED output pins to indicate various conditions.
A jabber condition occurs in 10 Mbits/s mode when the transmit packet
exceeds a predetermined length. When jabber is detected, the TP
transmit outputs are forced to the idle state, a collision is asserted, and
the JAB register bit is set in the MI serial port Status register.
Clearing the Jabber Disable (JAB_DIS) bit to 0 in the MI serial port
Configuration register disables the jabber function.
The jabber function is disabled in the 100 Mbits/s mode.
The device is reset when
1. V
2. the reset bit (RST) is set in the MI serial port Control register, or
3. the RESETn pin is asserted (LOW).
When reset occurs because of (1) or (2), an internal power-on reset
pulse is generated that resets all internal circuits, forces the MI serial port
Functional Description
Section 2.3.13, “LED Drivers,” page 2-28
DD
DD
is applied to the device, or
or GND and can also drive a digital input.
Copyright © 2000, 2001, 2002 by LSI Logic Corporation. All rights reserved.
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