ADG709BRU Analog Devices Inc, ADG709BRU Datasheet - Page 18

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ADG709BRU

Manufacturer Part Number
ADG709BRU
Description
IC MULTIPLEXER DUAL 4X1 16TSSOP
Manufacturer
Analog Devices Inc
Type
Analog Multiplexerr
Datasheet

Specifications of ADG709BRU

Rohs Status
RoHS non-compliant
Function
Multiplexer
Circuit
2 x 4:1
On-state Resistance
4.5 Ohm
Voltage Supply Source
Single, Dual Supply
Voltage - Supply, Single/dual (±)
1.8 V ~ 5.5 V, ±2.5 V
Current - Supply
0.001µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Package
16TSSOP
Maximum On Resistance
11@3V Ohm
Maximum Propagation Delay Bus To Bus
14(Typ)@5V|18(Typ)@3V|14(Typ)@±2.5V ns
Maximum High Level Output Current
30 mA
Multiplexer Architecture
4:1
Number Of Channels Per Chip
1
Maximum Turn-off Time
8(Typ)@3V ns
Maximum Turn-on Time
18(Typ)@3V ns
Power Supply Type
Single|Dual

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ADG708/ADG709
TERMINOLOGY
V
Most positive power supply potential.
V
Most negative power supply in a dual-supply application. In
single-supply applications, tie V
GND
Ground (0 V) reference.
S
Source terminal. Can be an input or output.
D
Drain terminal. Can be an input or output.
Ax
Logic control input.
EN
Active high enable.
R
Ohmic resistance between D and S.
R
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
I
Source leakage current with the switch off.
I
Drain leakage current with the switch off.
I
Channel leakage current with the switch on.
V
Analog voltage on Terminal D and Terminal S.
C
Off switch source capacitance. Measured with reference to ground.
C
Off switch drain capacitance. Measured with reference to ground.
C
On switch capacitance. Measured with reference to ground.
C
Digital input capacitance.
S
D
D
ON
FLAT (ON)
S
D
D
IN
DD
SS
D
, I
(Off)
(Off)
, C
(Off)
(V
(Off)
S
(On)
S
S
)
(On)
SS
to ground at the device.
Rev. C | Page 18 of 20
t
Delay time measured between the 50% and 90% points of the
digital inputs and the switch on condition when switching from
one address state to another.
t
Delay time between the 50% and 90% points of the EN digital
input and the switch on condition.
t
Delay time between the 50% and 90% points of the EN digital
input and the switch off condition.
t
Off time measured between the 80% points of both switches
when switching from one address state to another.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
Charge
A measure of the glitch impulse transferred from injection of
the digital input to the analog output during switching.
Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
On Loss
The loss due to the on resistance of the switch.
V
Maximum input voltage for Logic 0.
V
Minimum input voltage for Logic 1.
I
Input current of the digital input.
I
Positive supply current.
I
Negative supply current.
TRANSITION
ON
OFF
OPEN
INL
DD
SS
INL
INH
(EN)
(I
(EN)
INH
)

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