M25P16-VMN3TPB Micron Technology Inc, M25P16-VMN3TPB Datasheet - Page 16

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M25P16-VMN3TPB

Manufacturer Part Number
M25P16-VMN3TPB
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M25P16-VMN3TPB

Lead Free Status / Rohs Status
Compliant

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Memory organization
The memory is organized as:
Each page can be individually programmed (bits are programmed from 1 to 0). The device is
sector or bulk erasable (bits are erased from 0 to 1) but not page erasable.
Figure 7.
HOLD
2 097 152 bytes (8 bits each)
32 sectors (512 Kbits, 65536 bytes each)
8192 pages (256 bytes each).
W
Q
C
D
S
Block diagram
Address Register
Control Logic
and Counter
00000h
I/O Shift Register
256 bytes (page size)
High voltage
Generator
X Decoder
Data Buffer
256 byte
1FFFFFh
000FFh
Register
Status
memory area
Size of the
read-only
AI04987

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