NOII4SM6600A-QDC ON Semiconductor, NOII4SM6600A-QDC Datasheet - Page 11

• Manufacturer Part Number: NOII4SM6600A-QDC
• Manufacturer: ON Semiconductor

Specifications of NOII4SM6600A-QDC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Analog to Digital Converter
The IBIS4-6600 has a two 10-bit flash analog digital converters.
The ADCs are electrically separated from the image sensor. The
inputs of the ADC must be tied externally to the outputs of the
output amplifiers. One ADC samples the even columns and the
second ADC samples the odd columns. Alternatively, one ADC
can also sample all the pixels.
The sensor's outputs are not designed to drive large loads.
Therefore, to drive a cable or long PCB trace, the outputs of the
sensor shoudl be buffered.
Table 6. ADC Specifications
The internal resistance has a value of approximately 577 . Only
277  of this internal resistance is actually used as reference for
the internal ADC.
Black Calibration
Due to slight variations in the chip fabrication process, the output
analog voltage of the PGA is not perfectly matched to the input
analog range of the ADC. As a result, a reduced dynamic range
is obtained when comparing sensors/cameras from different lots.
Input Range
Quantization
Nominal Data Rate 20 Msamples/s
DNL
INL
Input Capacitance
Conversion Law
Parameter
REG_CLOCK
SPI_DATA
SPI_CLK
Set by External Resistors
(Refer the section
tance has a value of approximately 577
W. Only 277 W of this internal resis-
tance is actually used as reference for
the internal
10 Bits
Typical: 1.5 LSB10
Typical: 5 LSB10
< 2 pF
Linear/Gamma corrected
Unity C ell
D
D
C
C
Q
Q
ADC.)
Specification
To address/data bus
The internal resis-
Dout
SPI_DATA
Rev. 9 | www.onsemi.com | Page 11 of 32
SPI_CLK
REG_CLOCK
Figure 9. SPI Interface
SPI_DATA
SPI_CLK
REG_CLOCK
This is especially true in the dark as it is possible that a part of
the analog range gets clipped when it reaches the ADC.
For this reason, black calibration step is required. Because this
is a fixed setting, and varies very slightly with temperature, the
setting can be done at the factory itself.
While grabbing normal images, the settings can be loaded from
an on-board memory.
In the IBIS4-6600 image sensor, black calibration step also tries
to match the output of the odd and even channels.
The steps for black calibration are -
1. Put the sensor in dark.
2. Change DAC_RAW such that no pixel or least number of
pixels (assuming there are defect pixels) have a zero ADC output
value.
3. Change DAC_FINE such that the average of the odd columns
is almost same as the even columns.
4. Change DAC_RAW again such that all pixels have a non-zero
output, but are as close to zero as possible.
5. Record the DAC_RAW and DAC_FINE values.
6. Load the recorded DAC register values during operation.
Serial to Parallel Interface (SPI)
To upload the sequencer registers, a dedicated serial to parallel
interface (SPI) is implemented. 16 bits (4 address bits + 12 data
bits) must be uploaded serially. The address must be uploaded
first (MSB first), then the data (also MSB first).
The elementary unit cell is shown in
cells are connected in series, having a common SPI_CLK form
the entire uploadable parameter block. Dout of one cell is
connected to SPI_DATA of the next cell (maximum speed is 20
MHz). The uploaded settings on the address/data bus are loaded
into the correct register of the sensor on the rising edge of signal
REG_CLOCK and become effective immediately.
A3
16 outputs to address/data bus
E ntire uploadable addres s block
A2
A1
Figure
D0
NOII4SM6600A
Internal register
upload
9. Sixteen of these