NOII4SM6600A-QDC ON Semiconductor, NOII4SM6600A-QDC Datasheet - Page 8

• Manufacturer Part Number: NOII4SM6600A-QDC
• Manufacturer: ON Semiconductor

Specifications of NOII4SM6600A-QDC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Pixel
Architecture
The pixel architecture is the classic three-transistor pixel, as
shown in
factor technique patented by FillFactory (US patent No.
6,225,670 and others).
Figure 5. 3T Pixel Architecture
Output Amplifier
The output amplifier subtracts the reset and signal voltages from
each other to cancel FPN as much as possible (shown in
Figure
two DACs. One DAC is used for the main offset (DAC_raw). The
other enables fine tuning to compensate the offset difference
between the signal paths arriving at the two amplifiers A1 and A2
(DAC_fine). With the analog multiplexer, the signals S1 and S2
from the two buses can be combined to one pixel output at full
pixel rate (40 MHz). However, the two analog signals S1 and S2
reset
7). The DAC that is used for offset adjustment consists of
Figure 5
M1
Vdd
The pixel is implemented using the high fill
M2
select
selec
M3
2222
output
(column)
Rev. 9 | www.onsemi.com | Page 8 of 32
Figure 6. Floor Plan Pixel Array
2210
FPN and PRNU
Fixed Pattern Noise correction is done on-chip. Raw images
taken by the sensor typically feature a residual (local) FPN of
0.35% RMS of the saturation voltage.
The Photo Response Non Uniformity (PRNU), caused by the
mismatch of photodiode node capacitances, is not corrected on
chip. Measurements indicate that the typical PRNU is about
1.5% RMS of the signal level.
Dark and Dummy Pixels
Figure 6
in portrait orientation. A ring of dummy pixels surrounds the
active pixels. Black pixels are implemented as "optical" black
pixels.
can also be available on two separate output pins to allow a
higher pixel rate.
The third DAC (DAC_dark) puts its value on the buses during the
calibration of the output amplifier. In case of nondestructive
readout (no double sampling), bus1_R and bus2_R are
continuously connected to the output of the DAC_fine to provide
a reference for the signals on bus1_S and bus2_S.
shows a plan of the pixel array. The sensor is designed
R ing of dummy pixels ,
covered with black layer,
readable
R ing of 2 dummy pixels ,
illuminated, readable
array of active pixels , read
3002x 2210
Dummy ring of pixels ,
s urrounding complete pixel
array. not read
NOII4SM6600A