LFE2-20E-5FN256I Lattice, LFE2-20E-5FN256I Datasheet - Page 106

• Manufacturer Part Number: LFE2-20E-5FN256I
• Description: IC FPGA 21KLUTS 193I/O 256FPBGA
• Manufacturer: Lattice
• Series: ECP2r

Specifications of LFE2-20E-5FN256I

• Number Of Logic Elements/cells: 21000
• Number Of Labs/clbs: 2625
• Total Ram Bits: 282624
• Number Of I /o: 193
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-BGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 220-1170; LFE2-20E-5FN256I; Q6411457

Signal Descriptions (Cont.)
Lattice Semiconductor
[LOC]_SQ_VCCIBm
[LOC]_SQ_VCCOBm
[LOC]_SQ_HDOUTNm
[LOC]_SQ_HDOUTPm
[LOC]_SQ_HDINNm
[LOC]_SQ_HDINPm
[LOC]_SQ_VCCTXm
[LOC]_SQ_VCCRXm
1. These signals are relevant for LatticeECP2M family.
2. m defines the associated channel in the Quad.
3. These signals are defined in Quads [LOC] indicates the corner SERDES Quad is located: ULC (upper left), URC (upper right), LLC (lower
4. When placing switching I/Os around these critical pins that are designed to supply the device with the proper reference or supply voltage,
5. There may be SPLLs that do not have dedicated I/Os.
left), LRC (lower right).
care must be given. For more information, refer to TN1159,
Signal Name
4
4
I/O
—
—
—
—
O
O
I
I
Input buffer power supply, channel m (1.2V/1.5V). This pin should be left float-
ing if the channel is unused.
Output buffer power supply, channel m (1.2V/1.5V). This pin should be left
floating if the channel is unused.
High-speed output, negative channel m
High-speed output, positive channel m
High-speed input, negative channel m
High-speed input, positive channel m
Transmitter power supply, channel m (1.2V). This pin must be tied to 1.2V
even if the channel is unused.
Receiver power supply, channel m (1.2V). This pin must be tied to 1.2V even if
the channel is unused.
LatticeECP2/M Pin Assignment
4-3
LatticeECP2/M Family Data Sheet
Description
Recommendations.
Pinout Information