LFE2-20E-5FN256I Lattice, LFE2-20E-5FN256I Datasheet - Page 96
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFE2-20E-5FN256I
Manufacturer Part Number
LFE2-20E-5FN256I
Description
IC FPGA 21KLUTS 193I/O 256FPBGA
Manufacturer
Lattice
Series
ECP2r
Datasheets
1.LFE2-12SE-6FN256C.pdf
(389 pages)
2.LFE3-35EA-8FN672I.pdf
(21 pages)
3.LFE2-20E-5FN256I.pdf
(4 pages)
4.LFE2-20E-5FN256I.pdf
(769 pages)
Specifications of LFE2-20E-5FN256I
Number Of Logic Elements/cells
21000
Number Of Labs/clbs
2625
Total Ram Bits
282624
Number Of I /o
193
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
256-BGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1170
LFE2-20E-5FN256I
Q6411457
LFE2-20E-5FN256I
Q6411457
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-20E-5FN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- LFE2-12SE-6FN256C PDF datasheet
- LFE3-35EA-8FN672I PDF datasheet #2
- LFE2-20E-5FN256I PDF datasheet #3
- LFE2-20E-5FN256I PDF datasheet #4
- Current page: 96 of 389
- Download datasheet (5Mb)
Lattice Semiconductor
PCI Express Electrical and Timing Characteristics
AC and DC Characteristics
Table 3-16. Transmit
Table 3-17. Receive
UI
V
V
V
V
V
I
Z
T
T
L
T
T
C
1. Values are measured at 2.5 Gbps.
2. Compliant to PCI Express v1.1.
3. Measured at 60ps with plug-in board and jitter due to socket removed.
UI
V
V
Z
Z
Z
T
T
Notes:
1. Measured with external AC-coupling on the receiver
2. Values are measured at 2.5 Gbps
TX-SHORT
TX-SKEW
TX-DIFF_P-P
TX-DE-RATIO
TX-CM-AC_P
TX-CM-DC-LINE-DELTA
TX-DC-CM
TX-DIFF-DC
TX-RISE
TX-FALL
TX-EYE
TX-EYE-MEDIAN-TO-MAX-JITTER
RX-DIFF_P-P
RX-IDLE-DET-DIFF_P-P
RX-DIFF-DC
RX-DC
RX-HIGH-IMP-DC
RX-EYE
RX-EYE-MEDIAN-TO-MAX-JITTER
TX
Symbol
Symbol
1
1, 2
3
Unit interval
Differential peak-to-peak output
voltage
De-emphasis differential output
voltage ratio
RMS AC peak common-mode out-
put voltage
Maximum Common mode voltage
delta between n and p channels
Tx DC common mode voltage
Output short circuit current
Differential output impedance
Tx output rise time
Tx output fall time
Lane-to-lane static output skew for
all lanes in port/link
Transmitter eye width
AC coupling capacitor
Unit Interval
Differential peak-to-peak input
voltage
Idle detect threshold voltage
DC differential input impedance
DC input impedance
Power-down DC input impedance
Receiver eye width
Description
Description
3-44
Test Conditions
Test Conditions
V
V
20 to 80%
20 to 80%
TX-D+
TX-D-
=0.0V
=0.0V
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
399.88
399.88
0.125
0.125
0.175
200K
0.75
Min.
Min
0.8
0.4
80
75
65
80
40
—
—
—
—
—
—
0
0
Typ.
Typ
400
-3.5
100
400
100
1.0
20
50
—
—
—
—
—
—
—
—
—
—
—
—
—
—
V
400.12
400.12
CCOB
0.125
-7.96
Max.
Max
120
200
175
120
1.2
5%
1.3
0.3
—
25
90
—
—
—
—
60
—
—
+
Ohms
Ohms
Ohms
Ohms
Units
Units
mV
mV
mA
mV
dB
nF
ps
ns
ps
UI
UI
UI
UI
UI
UI
V
V
V
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