TE28F800B3TA90 Intel, TE28F800B3TA90 Datasheet - Page 8
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TE28F800B3TA90
Manufacturer Part Number
TE28F800B3TA90
Description
Manufacturer
Intel
Datasheet
1.TE28F800B3TA90.pdf
(70 pages)
Specifications of TE28F800B3TA90
Cell Type
NOR
Density
8Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Top
Address Bus
19b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
512K
Supply Current
18mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TE28F800B3TA90
Manufacturer:
INTEL
Quantity:
11
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
2.0
3.0
8
V
V
V
Bus Width
Speed
Memory Arrangement
Blocking (top or bottom)
Locking
Operating Temperature
Program/Erase Cycling
Packages
NOTES:
1. 32-Mbit and 64-Mbit densities not available in 40-lead TSOP.
2. 8-Mbit densities not available in BGA* CSP.
3. V
CC
CCQ
PP
Table 1.
Program/Erase Voltage
Read Voltage
CC
I/O Voltage
Max is 3.3 V on 0.25 m 32-Mbit devices.
Feature
Functional Overview
The B3 flash memory device features the following:
B3 Device Feature Summary
Functional Overview
Intel provides the most flexible voltage solution in the flash industry, providing three discrete
voltage supply pins: V
Erase operation. All B3 flash memory devices provide program/erase capability at 2.7 V or 12 V
(for fast production programming), and read with V
flash memory a large percentage of the time, 2.7 V V
savings.
•
•
•
•
Enhanced blocking for easy segmentation of code and data or additional design flexibility
Program Suspend to Read command
V
diagrams and V
Maximum program and erase time specification for improved data storage.
CCQ
input of 1.65 V to 2.5 V or 2.7 V to 3.6 V on all I/Os. See Figures 1 through 4 for pinout
2048 Kbit x 8 (16 Mbit)
48-Ball
28F008B3, 28F016B3
1024 Kbit x 8 (8 Mbit),
One hundred twenty-seven 64-Kbyte main blocks (64 Mbit)
40-lead TSOP
CCQ
CC
Sixty-three 64-Kbyte main blocks (32 Mbit)
location
Thirty-one 64-Kbyte main blocks (16 Mbit)
8 bit
BGA* CSP
for Read operation, V
WP# locks/unlocks parameter blocks
Eight 8-Kbyte parameter blocks and
All other blocks protected using V
70 ns, 80 ns, 90 ns, 100 ns, 110 ns
Fifteen 64-Kbyte blocks (8 Mbit) or
2.7 V– 3.6 V or 11.4 V– 12.6 V
1.65 V–2.5 V or 2.7 V– 3.6 V
Extended: –40 C to +85 C
(1)
,
(2)
100,000 cycles
2.7 V– 3.6 V
CCQ
28F320B3
1024 Kbit x 16 (16 Mbit),
2048 Kbit x 16 (32 Mbit),
4096 Kbit x 16 (64 Mbit)
28F800B3, 28F160B3,
48-Ball
512 Kbit x 16 (8 Mbit),
CC
for output swing, and V
48-Ball VF BGA
48-Lead TSOP,
CC
at 2.7 V. Since many designs read from the
operation can provide substantial power
PP
16 bit
(3)
BGA CSP
, 28F640B3
(2)
,
PP
Section
7.2
Section 4.2, 4.4
Section 4.2, 4.4
Table 25
Section 8.1
Section 3.2
Section 3.2
“Memory Maps and
Block Organization” on
page 10
Section 12.0
Table 30
Section
7.2
Section
7.2
Figure
for Program and
Reference
8,
6.2,
6.2,
6.2,
Figure 9
Datasheet
Section
Section
Section