TB28F008S5-100 Intel, TB28F008S5-100 Datasheet - Page 24

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TB28F008S5-100

Manufacturer Part Number
TB28F008S5-100
Description
Manufacturer
Intel
Datasheet

Specifications of TB28F008S5-100

Cell Type
NOR
Density
8Mb
Access Time (max)
100ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
20b
Operating Supply Voltage (typ)
5V
Operating Temp Range
-40C to 85C
Package Type
SOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
1M
Mounting
Surface Mount
Pin Count
44
Lead Free Status / Rohs Status
Not Compliant
28F004S5, 28F008S5, 28F016S5
24
FULL STATUS CHECK PROCEDURE
Read Status Register
Clear Block Lock-Bits
Read Status Register
Clear Block Lock-Bits
Data (See Above)
Check if Desired
Successful
Write 60H
Full Status
Write D0H
Complete
SR.4,5 =
SR.7 =
SR.5 =
SR.3 =
SR.1 =
Start
0
0
0
0
1
0
1
1
1
1
Clear Block Lock-Bits
Device Protect Error
Command Sequence
V
PP
Figure 11. Clear Block Lock-Bits Flowchart
Range Error
Error
Error
Write FFH after the clear block lock-bits operation to place device in
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear Status
If error is detected, clear the Status Register before attempting
read array mode.
Register command.
retry or other error recovery.
Standby
Operation
Operation
Read
Write
Standby
Standby
Standby
Standby
Write
Bus
Bus
Lock-Bits Confirm
Lock-Bits Setup
Command
Clear Block
Clear Block
Command
Check SR.3
1 = V
Check SR.1
1 = Device Protect Detect
Check SR.4,5
Both 1 = Command Sequence Error
Check SR.5
1 = Clear Block Lock Bits Error
Master Lock-Bit Is Set
RP# = V
Check SR.7
1 = WSM Ready
0 = WSM Busy
Status Register Data
PP
Data = 60H
Addr = X
Data = D0H
Addr = X
PRELIMINARY
Error Detect
Comments
Comments
IH
,

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