CY7C09569V-83AC Cypress Semiconductor Corp, CY7C09569V-83AC Datasheet - Page 24

• Manufacturer Part Number: CY7C09569V-83AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C09569V-83AC

• Density: 576Kb
• Access Time (max): 18ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 45MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 14b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 360mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Word Size: 36b
• Number Of Words: 16K
• Lead Free Status / Rohs Status: Not Compliant

Read/Write and Enable Operation
Address Counter Control Operation
Document Number: 38-06054 Rev. *D
Notes
Address
73. “X” = “Don’t Care,” “H” = V
74. ADS, CNTEN, CNTRST = “Don’t Care.”
75. OE is an asynchronous input signal.
76. When CE changes state In the pipelined mode, deselection and read happen in the following clock cycle.
77. Counter operation is independent of CE.
A
A
OE
X
X
X
X
X
H
L
n
n
Previous
Address
A
A
A
X
X
n
n
n
CLK
X
IH
CLK
Inputs
, “L” = V
IL
.
OE
CE
X
X
X
X
L
H
L
L
L
R/W
X
X
H
X
X
[73, 74, 75]
R/W
H
X
L
X
[73, 77]
ADS
H
H
X
L
L
CNTEN
H
H
X
L
L
I/O
Outputs
High Z
High Z
D
0
D
OUT
–I/O
CNTRST
IN
35
H
H
H
H
L
Increment Counter Increment
Hold +
Mode
Reset
Read
Load
Hold
Deselected
Write
Read
Outputs Disabled
[76]
Counter Reset
Address Load into Counter
External Address Blocked -
Counter Address Readout
External Address Blocked -
Counter Disabled
[76]
Operation
Operation
CY7C09569V
CY7C09579V
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