CY62137CV33LL-55BVI Cypress Semiconductor Corp, CY62137CV33LL-55BVI Datasheet - Page 6
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CY62137CV33LL-55BVI
Manufacturer Part Number
CY62137CV33LL-55BVI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY62137CV33LL-55BVI.pdf
(13 pages)
Specifications of CY62137CV33LL-55BVI
Density
2Mb
Access Time (max)
55ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
15mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Word Size
16b
Number Of Words
128K
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY62137CV33LL-55BVI
Manufacturer:
CYPRESS
Quantity:
151
Switching Characteristics
Over the operating range
Notes
Document Number: 38-05201 Rev. *H
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
t
8. Test conditions assume signal transition time of 5 ns or less, timing reference levels of V
9. At any given temperature and voltage condition, t
10. t
11. If both byte enables are toggled together, this value is 10 ns.
12. The internal write time of the memory is defined by the overlap of WE, CE = V
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
DBE
LZBE
HZBE
WC
SCE
AW
HA
SA
PWE
BW
SD
HD
HZWE
LZWE
Parameter
I
device.
signals can terminate a write by going INACTIVE. The data input setup and hold timing are referenced to the edge of the signal that terminates the write.
OL
HZOE
/I
OH
, t
HZCE
and 30 pF load capacitance.
, t
[12]
HZBE
Read Cycle Time
Address to Data Valid
Data Hold From Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low-Z
OE HIGH to High-Z
CE LOW to Low-Z
CE HIGH to High-Z
CE LOW to Power Up
CE HIGH to Power Down
BLE/BHE LOW to Data Valid
BLE/BHE LOW to Low-Z
BLE/BHE HIGH to High-Z
Write Cycle Time
CE LOW to Write End
Address Setup to Write End
Address Hold from Write End
Address Setup to Write Start
WE Pulse Width
BLE/BHE LOW to Write End
Data Setup to Write End
Data Hold From Write End
WE LOW to High-Z
WE HIGH to Low-Z
, and t
HZWE
[8]
transitions are measured when the output enters a high-impedance state.
[9]
[9]
[9, 10]
[9, 10]
[9, 10]
[9]
Description
HZCE
[9, 11]
[9, 10]
is less than t
LZCE
, t
HZBE
IL
, BHE, and/or BLE = V
is less than t
CC(Typ)
LZBE
/2, input pulse levels of 0 to V
, t
Min
55
55
10
10
45
45
40
50
25
10
HZOE
5
0
5
0
0
0
IL
. All signals must be ACTIVE to initiate a write and any of these
55 ns
is less than t
CY62137CV30/33 MoBL
Max
55
55
25
20
20
55
55
20
20
LZOE
, and t
CY62137CV MoBL
CC(Typ)
Min
70
10
10
70
60
60
45
60
30
10
HZWE
5
0
5
0
0
0
, and output loading of the specified
70 ns
is less than t
Max
70
70
35
25
25
70
70
25
25
LZWE
Page 6 of 13
for any given
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
®
®
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