CY62157DV20L-55BVI Cypress Semiconductor Corp, CY62157DV20L-55BVI Datasheet
CY62157DV20L-55BVI
Specifications of CY62157DV20L-55BVI
Related parts for CY62157DV20L-55BVI
CY62157DV20L-55BVI Summary of contents
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... Circuit Note: 1. For best practice recommendations, please refer to the Cypress application note System Design Guidelines on http://www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05136 Rev (512K x 16) Static RAM deselected Chip Enable 1 (CE LOW or both BHE and BLE are HIGH. The input/output pins ...
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Pin Configuration Notes pins are not connected to the die. 3. DNU pins are to be connected left open. SS Document #: 38-05136 Rev. *B FBG A Top View ...
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... Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential . 0. Voltage Applied to Outputs Product Portfolio V Range(V) CC Product Min. Typ. CY62157DV20L 1.65 1.8 CY62157DV20LL 1.65 1.8 DC Electrical Characteristics Parameter Description V Output HIGH Voltage Output LOW Voltage ...
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Thermal Resistance Parameter Description Thermal Resistance (Junction to JA [6] Ambient) Thermal Resistance (Junction to JC [6] Case) AC Test Loads and Waveforms OUTPUT 30 pF INCLUDING JIG AND SCOPE Equivalent to: OUTPUT Parameters ...
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Switching Characteristics (Over the Operating Range) Parameter Description Read Cycle t Read Cycle Time RC t Address to Data Valid AA t Data Hold from Address Change OHA t CE LOW or CE HIGH to Data Valid ACE 1 2 ...
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Switching Waveforms (continued) [15, 16] Read Cycle No. 2 (OE Controlled) ADDRESS BLE t LZBE OE HIGH IMPEDANCE DAT A OUT t LZCE SUPPLY C URRENT ...
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Switching Waveforms (continued) Write Cycle No Controlled ADDR HE DAT AI/O DON’T CARE t Write Cycle No. 3 (WE Controlled, OE LOW) ...
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... Switching Waveforms (continued) Write Cycle No. 4 (BHE/BLE Controlled, OE LOW) ADDR ESS /BLE DATA I/O DON’T CARE Ordering Information Speed (ns) Ordering Code 55 CY62157DV20L-55BVI 55 CY62157DV20LL-55BVI 70 CY62157DV20L-70BVI CY62157DV20LL-70BVI Document #: 38-05136 Rev. *B [19 SCE PWE t SD VALID DATA IN Package Name Package Type BV48A 48-ball Fine Pitch BGA ( mm) ...
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... Document #: 38-05136 Rev. *B © Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...
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Document History Page Document Title: CY62157DV20 MoBL2 Document Number: 38-05136 Issue REV. ECN NO. Date ** 115250 05/29/02 *A 124693 03/18/03 *B 124693 03/19/03 Document #: 38-05136 Rev. *B 512K x 16 Static RAM Orig. of Change Description of Change ...