CY62167DV30L-70BVI Cypress Semiconductor Corp, CY62167DV30L-70BVI Datasheet - Page 7

• Manufacturer Part Number: CY62167DV30L-70BVI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY62167DV30L-70BVI

• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05328 Rev. *E
Switching Waveforms
Write Cycle 1 (WE Controlled)
Notes:
20. Address valid prior to or coincident with CE
21. Data I/O is high-impedance if OE = V
22. If CE
23. During this period, the I/Os are in output state and input signals should not be applied.
ADDRESS
DATA I/O
BHE/BLE
1
goes HIGH and CE
CE
CE
WE
OE
1
2
See Note 23
2
goes LOW simultaneously with WE = V
(continued)
[17, 21, 22, 23]
IH
.
t
SA
t
HZOE
1
, BHE, BLE transition LOW and CE
t
AW
IH
, the output remains in a high-impedance state.
t
SCE
t
2
WC
transition HIGH.
t
BW
VALID DATA
t
t
PWE
SD
t
HA
t
HD
CY62167DV30
MoBL
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