CY7C1018CV33-10VC Cypress Semiconductor Corp, CY7C1018CV33-10VC Datasheet - Page 3

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CY7C1018CV33-10VC

Manufacturer Part Number
CY7C1018CV33-10VC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1018CV33-10VC

Density
1Mb
Access Time (max)
10ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
SOJ
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
90mA
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Number Of Words
128K
Lead Free Status / Rohs Status
Not Compliant
Document #: 38-05131 Rev. *D
AC Test Loads and Waveforms
Switching Characteristics
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
Notes:
10. The minimum Write cycle time for Write Cycle No. 3 (WE controlled, OE LOW) is the sum of t
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
4.
5.
6.
7.
8.
9.
High-Z characteristics:
Parameter
[8]
[8]
AC characteristics (except High-Z) for all speeds are tested using the Thèvenin load shown in Figure (a). High-Z characteristics are tested for all speeds using
the test load shown in Figure (c).
Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V.
t
At any given temperature and voltage condition, t
This parameter is guaranteed by design and is not tested.
The internal Write time of the memory is defined by the overlap of CE LOW and WE LOW. CE and WE must be LOW to initiate a Write, and the transition of any of these
signals can terminate the Write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the Write.
HZOE
OUTPUT
OUTPUT
, t
HZCE
3.3V
(c)
[9, 10]
3.3V
, and t
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low-Z
OE HIGH to High-Z
CE LOW to Low-Z
CE HIGH to High-Z
CE LOW to Power-up
CE HIGH to Power-down
Write Cycle Time
CE LOW to Write End
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
Data Set-up to Write End
Data Hold from Write End
WE HIGH to Low-Z
WE LOW to High-Z
5 pF
HZWE
30 pF
are specified with a load capacitance of 5 pF as in (d) of AC Test Loads. Transition is measured ± 500 mV from steady-state voltage.
(a)
R 317Ω
R 317Ω
Description
351Ω
Over the Operating Range
[7]
R2
[6, 7]
[7]
[6, 7]
[6, 7]
351Ω
R2
[4]
HZCE
is less than t
LZCE
GND
3.0V
Min.
Rise Time: 1 V/ns
10
10
3
0
3
0
8
8
0
0
7
5
0
3
, t
HZOE
[5]
-10
is less than t
Max.
10
10
10
5
5
5
5
LZOE
10%
90%
, and t
HZWE
ALL INPUT PULSES
Min.
12
12
3
0
3
0
9
9
0
0
8
6
0
3
HZWE
and t
is less than t
(b)
-12
SD
.
Max.
12
12
12
6
6
6
6
LZWE
for any given device.
Fall Time: 1 V/ns
CY7C1018CV33
90%
Min.
15
15
10
10
10
10%
3
0
3
0
0
0
8
0
3
-15
Max.
15
15
15
7
7
7
7
Page 3 of 7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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