CY7C195-15VC Cypress Semiconductor Corp, CY7C195-15VC Datasheet - Page 4

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CY7C195-15VC

Manufacturer Part Number
CY7C195-15VC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C195-15VC

Density
256Kb
Access Time (max)
15ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
16b
Package Type
SOJ
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
145mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
28
Word Size
4b
Number Of Words
64K
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C195-15VC
Manufacturer:
IKANOS
Quantity:
48
Part Number:
CY7C195-15VC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
:
Switching Characteristics
Document #: 38-05162 Rev. **
Parameter
READ CYCLE
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
Notes:
10. The internal write time of the memory is defined by the overlap of CE
ACE2
LZCE2
HZCE2
RC
AA
OHA
ACE1
DOE
LZOE
HZOE
LZCE1
HZCE1
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
7.
8.
9.
Test conditions assume signal transition time of 3 ns or less for -12 and -15 speeds and 5 ns or less for -20 and slower speeds, timing reference levels of 1.5V,
input pulse levels of 0 to 3.0V, and output loading of the specified I
t
At any given temperature and voltage condition, t
terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
HZOE
,
,
,
, t
HZCE
Read Cycle Time
Address to Data
Valid
Output Hold from
Address Change
CE LOW to
Data Valid
OE LOW to
Data Valid
OE LOW to
Low Z
OE HIGH to
High Z
CE LOW to
Low Z
CE HIGH to
High Z
CE LOW to
Power-Up
CE HIGH to
Power-Down
Write Cycle Time
CE LOW to Write End
Address Set-Up to
Write End
Address Hold from
Write End
Address Set-Up to
Write Start
WE Pulse Width
Data Set-Up to
Write End
Data Hold from
Write End
WE HIGH to
Low Z
WE LOW to
High Z
, and t
[10]
Description
HZWE
[8]
[8]
[8]
[8,8]
[8, 9]
are specified with C
7C195,
7C196
7C195,
7C196
7C195,
7C196
Over the Operating Range
L
Min.
12
12
= 5 pF as in part (b) of AC Test Loads. Transition is measured 500 mV from steady-state voltage.
7C194-12
7C195-12
7C196-12
3
0
3
0
9
9
0
0
8
8
0
3
HZCE
Max.
12
12
12
5
5
5
7
is less than t
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
7C194-15
7C195-15
7C196-15
15
15
10
10
3
0
3
0
0
0
9
9
0
3
LZCE
OL
1
/I
[7]
LOW, CE
OH
15
15
15
and t
7
7
7
7
and 30-pF load capacitance.
HZWE
2
7C194-20
7C195-20
7C196-20
20
20
15
15
15
10
LOW, and WE LOW. All signals must be LOW to initiate a write and any signal can
3
0
3
0
0
0
0
3
is less than t
20
20
20
10
9
9
9
LZWE
7C194-25
7C195-25
7C196-25
25
25
18
20
18
10
for any given device.
3
3
3
0
0
0
0
3
0
25
25
10
25
13
11
11
7C194-35
7C195-35
7C196-35
35
35
22
25
22
15
3
3
3
0
0
0
0
3
0
35
35
16
15
15
35
15
7C194-45
7C196-45
45
45
22
35
22
15
3
3
3
0
0
0
0
3
0
CY7C194
CY7C195
CY7C196
Page 4 of 12
45
45
16
15
15
45
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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