CY7C68013-128AXC Cypress Semiconductor Corp, CY7C68013-128AXC Datasheet - Page 31

CY7C68013-128AXC

Manufacturer Part Number
CY7C68013-128AXC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C68013-128AXC

Cpu Family
FX2LP
Device Core
8051
Device Core Size
8b
Frequency (max)
48MHz
Interface Type
I2C/USB
Program Memory Type
ROMLess
Program Memory Size
Not Required
Total Internal Ram Size
8KB
# I/os (max)
40
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
128
Package Type
TQFP
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C68013-128AXC
Manufacturer:
CY
Quantity:
1 000
Part Number:
CY7C68013-128AXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
9.3
Document #: 38-08012 Rev. *F
t
t
t
t
t
t
t
t
When using the AUTPOPTR1 or AUTOPTR2 to address external memory, the address of AUTOPTR1 will only be active while
either RD# or WR# are active. The address of AUTOPTR2 will be active throughout the cycle and meet the above address valid
time for which is based on the stretch value.
Note:
12. t
CL
AV
STBL
STBH
SCSL
SOEL
DSU
DH
Parameter
t
t
t
t
ACC2
ACC2
ACC2
ACC3
ACC3
CLKOUT
Data Memory Read
(24 MHz) = 3*t
(48 MHz) = 3*t
(24 MHz) = 5*t
(48 MHz) = 5*t
CLKOUT
and t
ACC3
A[15..0]
A[15..0]
[10]
D[7..0]
D[7..0]
are computed from the above parameters as follows:
[10]
1/CLKOUT Frequency
Delay from Clock to Valid Address
Clock to RD LOW
Clock to RD HIGH
Clock to CS LOW
Clock to OE LOW
Data Set-up to Clock
Data Hold Time
OE#
RD#
RD#
CS#
CS#
CL
CL
CL
CL
– t
– t
– t
– t
AV
AV
AV
AV
–t
– t
–t
– t
DSU
DSU
DSU
DSU
t
t
AV
AV
t
t
CL
CL
= 106 ns
= 190 ns
= 43 ns
= 86 ns.
Description
Figure 9-2. Data Memory Read Timing Diagram
t
STBL
t
t
ACC1
SCSL
t
SOEL
[12]
Stretch = 0
Stretch = 1
t
data in
DSU
t
ACC1
[12]
Min.
9.6
t
0
STBH
t
DH
20.83
41.66
Typ.
83.2
t
AV
t
data in
DSU
Max.
10.7
11.1
11
11
13
t
DH
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CY7C68013
Page 31 of 48
48 MHz
24 MHz
12 MHz
Notes

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