APA075-TQ100I MICROSEMI, APA075-TQ100I Datasheet - Page 16
APA075-TQ100I
Manufacturer Part Number
APA075-TQ100I
Description
Manufacturer
MICROSEMI
Datasheet
1.APA075-TQ100I.pdf
(178 pages)
Specifications of APA075-TQ100I
Family Name
ProASICPLUS®
Number Of Usable Gates
75000
# Registers
3072
# I/os (max)
66
Frequency (max)
180MHz
Process Technology
0.22um (CMOS)
Operating Supply Voltage (typ)
2.5V
Ram Bits
27648
Device System Gates
75000
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (max)
2.7V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant
Available stocks
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Part Number:
APA075-TQ100I
Manufacturer:
ACTEL
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Input/Output Blocks
To meet complex system demands, the ProASIC
family offers devices with a large number of user I/O
pins; up to 712 on the APA1000.
available supply voltage configurations (the PLL block
uses an independent 2.5 V supply on the AVDD and
AGND pins). All I/Os include ESD protection circuits. Each
I/O has been tested to 2000 V to the human body model
(per JESD22 (HBM)).
Six or seven standard I/O pads are grouped with a GND
pad and either a V
pad. Two reference bias signals circle the chip. One
protects the cascaded output drivers, while the other
creates a virtual V
I/O pads are fully configurable to provide the maximum
flexibility and speed. Each pad can be configured as an
input, an output, a tristate driver, or a bidirectional
buffer
Table 2-4 •
2 -6
Function
I/O pads configured as inputs
I/O pads configured as outputs
I/O pads configured as bidirectional
buffers
ProASIC
(Figure 2-6
PLUS
I/O Features
Flash Family FPGAs
DD
and
DD
supply for the I/O ring.
Table
(core power) or V
2-4).
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Table 2-3
Selectable 2.5 V or 3.3 V threshold levels
Optional pull-up resistor
Optionally configurable as Schmitt trigger input. The Schmitt trigger input option can be
configured as an input only, not a bidirectional buffer. This input type may be slower than
a standard input under certain conditions and has a typical hysteresis of 0.35 V. I/O macros
with an "S" in the standard I/O library have added Schmitt capabilities.
3.3 V PCI Compliant (except Schmitt trigger inputs)
Selectable 2.5 V or 3.3 V compliant output signals
2.5 V – JEDEC JESD 8-5
3.3 V – JEDEC JESD 8-A (LVTTL and LVCMOS)
3.3 V PCI compliant
Ability to drive LVTTL and LVCMOS levels
Selectable drive strengths
Selectable slew rates
Tristate
Selectable 2.5 V or 3.3 V compliant output signals
2.5 V – JEDEC JESD 8-5
3.3 V – JEDEC JESD 8-A (LVTTL and LVCMOS)
3.3 V PCI compliant
Optional pull-up resistor
Selectable drive strengths
Selectable slew rates
Tristate
DDP
(I/O power)
shows the
PLUS
v5.9
Table 2-3 •
Figure 2-6 • I/O Block Schematic Representation
Input Compatibility
Output Drive
Description
ProASIC
3.3 V / 2.5 V Signal Control Drive
Strength and Slew-Rate Control
EN
A
Signal Control
Y
3.3 V / 2.5 V
PLUS
I/O Power Supply Voltages
Control
Pull-up
2.5 V
2.5 V
2.5 V
Pad
V
DDP
3.3 V
3.3 V
3.3 V
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