M24256-AWMN6T STMicroelectronics, M24256-AWMN6T Datasheet - Page 3

• Manufacturer Part Number: M24256-AWMN6T
• Manufacturer: STMicroelectronics

Specifications of M24256-AWMN6T

• Density: 256Kb
• Interface Type: Serial (I2C)
• Organization: 32Kx8
• Access Time (max): 900ns
• Frequency (max): 400KHz
• Write Protection: Yes
• Data Retention: 40Year
• Operating Supply Voltage (typ): 3.3/5V
• Package Type: SOIC N
• Operating Temp Range: -40C to 85C
• Supply Current: 1mA
• Operating Supply Voltage (min): 2.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / Rohs Status: Not Compliant

line packages. The M24256-A is also available in
a chip-scale (SBGA) package.
These memory devices are compatible with the
I
serial interface that uses a bi-directional data bus
and serial clock. The memory carries a built-in 4-
bit unique Device Type Identifier code (1010) in
accordance with the I
The memory behaves as a slave device in the I
protocol, with all memory operations synchronized
by the serial clock. Read and Write operations are
initiated by a START condition, generated by the
bus master. The START condition is followed by a
Device Select Code and RW bit (as described in
Table 3), terminated by an acknowledge bit.
When writing data to the memory, the memory in-
serts an acknowledge bit during the 9
following the bus master’s 8-bit transmission.
When data is read by the bus master, the bus
master acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by
a STOP condition after an Ack for WRITE, and af-
ter a NoAck for READ.
Power On Reset: V
In order to prevent data corruption and inadvertent
write operations during power up, a Power On Re-
set (POR) circuit is included. The internal reset is
held active until the V
POR threshold value, and all operations are dis-
abled – the device will not respond to any com-
mand. In the same way, when V
operating voltage, below the POR threshold value,
all operations are disabled and the device will not
respond to any command. A stable and valid V
must be applied before applying any logic signal.
Figure 3. Maximum R
2
C extended memory standard. This is a two wire
20
16
12
8
4
0
10
CC
2
CC
C bus definition.
L
Lock-Out Write Protect
Value versus Bus Capacitance (C
voltage has reached the
CC
C BUS (pF)
drops from the
100
fc = 400kHz
th
bit time,
2
CC
fc = 100kHz
C
SIGNAL DESCRIPTION
Serial Clock (SCL)
The SCL input pin is used to strobe all data in and
out of the memory. In applications where this line
is used by slaves to synchronize the bus to a slow-
er clock, the master must have an open drain out-
put, and a pull-up resistor must be connected from
the SCL line to V
value of the pull-up resistor can be calculated). In
most applications, though, this method of synchro-
nization is not employed, and so the pull-up resis-
tor is not necessary, provided that the master has
a push-pull (rather than open drain) output.
Serial Data (SDA)
The SDA pin is bi-directional, and is used to trans-
fer data in or out of the memory. It is an open drain
output that may be wire-OR’ed with other open
drain or open collector signals on the bus. A pull
up resistor must be connected from the SDA bus
to V
pull-up resistor can be calculated).
Chip Enable (E1, E0)
These chip enable inputs are used to set the value
that is to be looked for on the two least significant
bits (b2, b1) of the 7-bit device select code. These
inputs must be tied to V
device select code. When unconnected, the E1
and E0 inputs are internally read as V
7 and Table 8)
Write Control (WC)
The hardware Write Control pin (WC) is useful for
protecting the entire contents of the memory from
inadvertent erase/write. The Write Control signal is
used to enable (WC=V
write instructions to the entire memory area. When
CC
BUS
. (Figure 3 indicates how the value of the
) for an I
1000
MASTER
V CC
CC
2
C Bus
. (Figure 3 indicates how the
SDA
SCL
CC
IL
) or disable (WC=V
or V
SS
R L
C BUS
to establish the
IL
M24256-A
R L
(see Table
AI01665
C BUS
3/20
IH
)