IS63LV1024-8T ISSI, Integrated Silicon Solution Inc, IS63LV1024-8T Datasheet - Page 8
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IS63LV1024-8T
Manufacturer Part Number
IS63LV1024-8T
Description
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet
1.IS63LV1024-8T.pdf
(16 pages)
Specifications of IS63LV1024-8T
Density
1Mb
Access Time (max)
8ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
160mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Number Of Words
128K
Lead Free Status / Rohs Status
Not Compliant
AC WAVEFORMS
WRITE CYCLE NO. 2
IS63LV1024
IS63LV1024L
8
Notes:
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
2. I/O will assume the High-Z state if OE > V
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
ADDRESS
ADDRESS
D
D
OUT
OUT
WE
WE
D
D
OE
OE
CE
CE
IN
IN
LOW
LOW
LOW
t
SA
(1)
t
DATA UNDEFINED
DATA UNDEFINED
(WE Controlled: OE is LOW During Write Cycle)
SA
(WE Controlled,
IH
.
Integrated Silicon Solution, Inc. — www.issi.com —
= HIGH during Write Cycle)
VALID ADDRESS
t
t
t
t
AW
AW
HZWE
HZWE
VALID ADDRESS
t
t
PWE1
WC
t
t
PWE2
WC
HIGH-Z
HIGH-Z
t
t
SD
SD
DATA
DATA
IN
IN
VALID
VALID
t
t
HD
HD
t
t
LZWE
LZWE
t
t
HA
HA
1-800-379-4774
CE_WR2.eps
CE_WR3.eps
07/02/2010
Rev. O