DSP56002FC66 Freescale Semiconductor, DSP56002FC66 Datasheet - Page 63
![](/photos/31/36/313697/132pin_pqfp_sml.jpg)
DSP56002FC66
Manufacturer Part Number
DSP56002FC66
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.DSP56002FC66.pdf
(110 pages)
Specifications of DSP56002FC66
Device Core Size
24b
Architecture
Harvard
Format
Fixed Point
Clock Freq (max)
66MHz
Mips
33
Device Input Clock Speed
66MHz
Ram Size
3KB
Program Memory Size
1.5KB
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSP56002FC66
Manufacturer:
MOTOROLA
Quantity:
5 530
Company:
Part Number:
DSP56002FC66
Manufacturer:
MOTOROLA
Quantity:
6 250
Company:
Part Number:
DSP56002FC66
Manufacturer:
MOTOROLA
Quantity:
591
Part Number:
DSP56002FC66
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Company:
Part Number:
DSP56002FC661H72G
Manufacturer:
AD
Quantity:
92
MOTOROLA
Notes:
Num
250B
251
(Output)
(Input)
DSCK
(Input)
DSO
1.
2.
DR
DR Assertion Width to Recover from Stop state and
enter Debug mode
DR Assertion to DSO (ACK) Valid (enter Debug
mode) after recovery from Stop state
A clock stabilization delay is required when using the on-chip crystal oscillator in two cases:
During this stabilization period, T
varies, a delay of 75,000 T
programs. While it is possible to set OMR bit 6 = 1 when using the internal crystal oscillator, it is not
recommended and these specifications do not guarantee timings for that case.
The maximum specified is periodically sampled and not 100% tested.
•
•
•
•
•
•
• after power-on Reset, and
• when recovering from Stop mode.
Stable External Clock,OMR Bit 6 = 0
Stable External Clock,OMR Bit 6 = 1
Stable External Clock,PCTL Bit 17= 1
Stable External Clock, OMR Bit 6 = 0
Stable External Clock, OMR Bit 6 = 1
Stable External Clock, PCTL Bit 17= 1
Freescale Semiconductor, Inc.
For More Information On This Product,
1
Characteristics
Figure 2-28 OnCE Acknowledge Timing
Figure 2-27 OnCE Serial Clock Timing
Go to: www.freescale.com
Table 2-15 OnCE Port Timing
C
is typically allowed to assure that the oscillator is stable before executing
233
DSP56002/D, Rev. 3
C
, T
1
230
H
, and T
L
will not be constant. Since this stabilization period
232
(ACK)
65549T
65553T
21T
14T
25T
18T
Min
C
C
C
C
C
+ T
+ T
C
+ T
+ T
231
+ T
+ T
L
L
L
L
L
L
OnCE Port Timing
Max
—
—
—
—
—
—
Specifications
AA0399
AA0400
Unit
ns
ns
ns
ns
ns
ns
2-37