JS28F640J3C115 Intel, JS28F640J3C115 Datasheet - Page 29

• Manufacturer Part Number: JS28F640J3C115
• Manufacturer: Intel

Specifications of JS28F640J3C115

• Cell Type: NOR
• Density: 64Mb
• Access Time (max): 115ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 23/22Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 8M/4M
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Compliant

7.4
7.5
Datasheet
S
R
T
P
Figure 14. AC Waveform for Reset Operation
Table 11. Reset Specifications
Figure 15. Transient Input/Output Reference Waveform for V
S
# ( P
( R
)
)
V
V
V
V
I H
I H
I L
I L
Reset Operation
NOTE: STS is shown in its default mode (RY/BY#).
AC Test Conditions
NOTE: AC test inputs are driven at V
NOTES:
1. These specifications are valid for all product versions (packages and speeds).
2. If RP# is asserted while a block erase, program, or lock-bit configuration operation is not
3. A reset time, t
P1
P2
#
executing then the minimum required RP# Pulse Low Time is 100 ns.
outputs are valid.
t
t
output timing ends, at V
PLPH
PHRH
V
Sym
CCQ
0.0
Input V
P
PHQV
1
RP# Pulse Low Time
(If RP# is tied to V
applicable)
RP# High to Reset during Block Erase, Program, or
Lock-Bit Configuration
, is required from the latter of STS (in RY/BY# mode) or RP# going high until
CCQ
/2
CCQ
/2 V (50% of V
CC
CCQ
, this specification is not
Parameter
P
2
for a Logic "1" and 0.0 V for a Logic "0." Input timing begins, and
CCQ
Test Points
). Input rise and fall times (10% to 90%) < 5 ns.
28F256J3, 28F128J3, 28F640J3, 28F320J3
CCQ
= 2.7 V–3.6 V
Min
35
V
Max
100
CCQ
/2
Unit
Output
µs
ns
Notes
1,2
1,3
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