A42MX24-PQ208 MICROSEMI, A42MX24-PQ208 Datasheet - Page 41

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A42MX24-PQ208

Manufacturer Part Number
A42MX24-PQ208
Description
Manufacturer
MICROSEMI
Datasheet

Specifications of A42MX24-PQ208

Family Name
42MX
Number Of Usable Gates
36000
Number Of Logic Blocks/elements
912
# Registers
1410
# I/os (max)
176
Process Technology
0.45um (CMOS)
Operating Supply Voltage (typ)
3.3/5V
Logic Cells
912
Device System Gates
36000
Propagation Delay Time
2.5/1.8ns
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A42MX24-PQ208
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
A42MX24-PQ208
Manufacturer:
ACTEL/爱特
Quantity:
20 000
Part Number:
A42MX24-PQ208A
Manufacturer:
Microsemi SoC
Quantity:
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Part Number:
A42MX24-PQ208I
Manufacturer:
Microsemi SoC
Quantity:
10 000
PCI System Timing Specification
Table 26
parameters and the corresponding timing parameters
for the MX PCI-compliant devices.
Table 26 •
Table 27 •
Symbol
t
t
t
Symbol
t
t
t
t
t
t
t
Notes:
1. T
2. REQ# and GNT# are point-to-point signals and have different output valid delay and input setup times than do bussed signals.
CYC
HIGH
LOW
VAL
VAL(PTP)
ON
OFF
SU
SU(PTP)
H
GNT# has a setup of 10; REW# has a setup of 12.
OFF
is system dependent. MX PCI devices have 7.4 ns turn-off time, reflection is typically an additional 10 ns.
and
Parameter
CLK Cycle Time
CLK High Time
CLK Low Time
Parameter
CLK to Signal Valid—Bused Signals
CLK to Signal Valid—Point-to-Point
Float to Active
Active to Float
Input Set-Up Time to CLK—Bused Signals
Input Set-Up Time to CLK—Point-to-Point
Input Hold to CLK
Clock Specification for 33 MHz PCI
Timing Parameters for 33 MHz PCI
Table 27
list the critical PCI timing
10, 12
Min.
Min.
2
v6.1
30
11
11
2
2
7
0
2
2
PCI Models
Actel provides synthesizable VHDL and Verilog-HDL
models for a PCI Target interface, a PCI Target and
Target+DMA Master interface. Contact your Actel sales
representative for more details.
PCI
PCI
Max.
Max.
11
12
28
Min.
Min.
1.5
4.0
1.9
1.9
2.0
2.0
2.0
1.5
0
A42MX24
A42MX24
Max.
Max.
8.3
9.0
9.0
4.0
1
40MX and 42MX FPGA Families
Min.
Min.
4.0
1.9
1.9
2.0
2.0
2.0
1.5
1.5
0
A42MX36
A42MX36
Max.
Max.
8.3
9.0
9.0
4.0
1
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1-35

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