RFW-D100 Vishay, RFW-D100 Datasheet - Page 22

• Manufacturer Part Number: RFW-D100
• Manufacturer: Vishay

Specifications of RFW-D100

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Package Type: LQFP
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / Rohs Status: Supplier Unconfirmed

RFW-D100
Vishay RFWaves
Bits 4-6: SIZE_LOC [0:2]
These bits determine the location of the packet size
parameter in the header (the location is specified in
bytes excluding preamble). The location should be
fixed for all the different kinds of packets transferred by
the network.
System Status Register (SSR)
This register is a read-only register.
This register provides status information to the MCU
concerning the RFW-D100 status, incoming bits, and
transmitted data. Bits 1, 2, 3 can trigger the interrupt if
enabled in the IER. Bits 0, 5 and 6 are set by HW and
cleared automatically after the MCU reads the register,
since they reflect some error in the operation of the
RFW-D100 and they are kept until the MCU knows
about it. Bits 1 ⇔ 4 and 7 are set and cleared by HW,
since they reflect the current status of internal
state-machine or the serial input.
Bit 0: CRC_ERROR
This flag indicates a CRC Error in the packet. The CRC
Block sets this flag at the end of a received packet, if
the CRC calculation result is false. The RFW-D100
compares the calculated CRC and the received CRC.
When these values differ, the flag goes high.
www.vishay.com
22
Size Location
NET_ID Location
Name
SSR
2
3
4
5
6
7
8
9
1
2
3
4
COMP_IN
SIZE LOC 2
Bit 7
0
0
0
0
1
1
1
1
NET LOC 1
0
0
1
1
TX_UF
SIZE LOC 1
Bit 6
0
0
1
1
0
0
1
1
For more information please contact: [e-mail]
BIT ERROR
NET LOC 0
Bit 5
SIZE LOC 0
0
1
0
1
0
1
0
1
0
1
0
1
LOCK
Bit 4
If NET_ID or NODE_ID filters are enabled, then the
packet’s size location must always come after NET_ID
or NODE_ID locations.
Default Value: 0 x 00
Node Identity Register (BIR)
This is a read/write register.
This register contains the NODE_ID value.
When the receiver in the RFW-D100 builds the
incoming packet, it compares the value in the BIR reg-
ister to the received data at the location specified in
LCR.
If the received NODE_ID and the expected NODE_ID
are not equal, the packet is discarded.
Four multicast NODE_ID addresses are implemented
in RFW-D100. All received packets with NODE_ID
“111111XX”, where ‘X’ represents do not care, will be
accepted, regardless of the BIR value.
Net Identity Register (NIR)
This is a read/write register.
This register contains the NET_ID value.
When the receiver in the RFW-D100 builds the
incoming packet, it compares the value in the NIR to
the received data at the location specified in LCR. If
received NET_ID and the expected NET_ID are not
equal, the packet is discarded.
Default Value: 0 x 00
The flag is cleared only after the MCU reads the SSR
register.
The CRC flag remains “1”, if the MCU does not read
the SSR register.
Bit 1: LOCKED_IN
This flag indicates that a packet is being received.
Bit 1 is set to logic 1 whenever the RFW-D100
identifies a new incoming packet (triggers LOCK_IN
interrupt). After PREAMBLE, NET_ID, and NODE_ID
have been identified, LOCKED_IN flag goes high. If
NODE_ID and NET_ID are disabled, PREAMBLE
identification is sufficient. LOCKED_IN flag goes low
when the packet ends (triggers LOCK_OUT interrupt).
Bit 2: TX_EMPTY
This bit is the Transmitter Empty flag. When this bit is
high, the RFW-D100 is available for loading the next
Default Value: 0 x 00
Bit 3
CS
TX EMPTY
Bit 2
LOCKED_IN
Bit 1
Document Number 84675
Rev. 1.1, 22-Jan-07
CRC ERROR
Bit 0