74LVC10APW NXP Semiconductors, 74LVC10APW Datasheet - Page 10

Gates (AND / NAND / OR / NOR) TRIPLE 3-INPUT NAND GATE

74LVC10APW

Manufacturer Part Number
74LVC10APW
Description
Gates (AND / NAND / OR / NOR) TRIPLE 3-INPUT NAND GATE
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC10APW

Product
NAND
Logic Family
LVC
Number Of Gates
3
Number Of Lines (input / Output)
3 / 1
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
3.9 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-14
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
 Details
Other names
74LVC10APW,112

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVC10APW
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Philips Semiconductors
2003 Jun 20
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
Triple 3-input NAND gate
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
OUTLINE
VERSION
SOT337-1
max.
A
2
0.21
0.05
A
1
Z
14
1
1.80
1.65
A
y
2
IEC
e
pin 1 index
0.25
A
3
D
0.38
0.25
b
p
0.20
0.09
b
MO-150
JEDEC
p
c
7
8
REFERENCES
D
6.4
6.0
w
0
(1)
M
E
5.4
5.2
(1)
c
JEITA
scale
2.5
0.65
10
e
H
7.9
7.6
E
A
2
A
5 mm
1.25
1
L
1.03
0.63
L
E
H
p
E
detail X
0.9
0.7
Q
L
L
p
PROJECTION
Q
EUROPEAN
0.2
v
(A )
3
A
0.13
w
A
Product specification
0.1
74LVC10A
X
y
v
ISSUE DATE
M
99-12-27
03-02-19
A
Z
1.4
0.9
(1)
SOT337-1
8
0
o
o

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