GAL22V10D-15LP Lattice, GAL22V10D-15LP Datasheet - Page 13
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GAL22V10D-15LP
Manufacturer Part Number
GAL22V10D-15LP
Description
SPLD - Simple Programmable Logic Devices 5V 22 I/O
Manufacturer
Lattice
Datasheet
1.GAL22V10D-10LJ.pdf
(23 pages)
Specifications of GAL22V10D-15LP
Logic Family
GAL
Number Of Macrocells
10
Maximum Operating Frequency
83.3 MHz
Number Of Programmable I/os
10
Delay Time
15 ns
Operating Supply Voltage
5 V
Supply Current
90 mA
Maximum Operating Temperature
+ 75 C
Minimum Operating Temperature
0 C
Package / Case
PDIP-24
Mounting Style
Through Hole
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Lead Free Status / Rohs Status
No
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Company
Part Number
Manufacturer
Quantity
Price
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fmax Descriptions
f
max with External Feedback 1/(
Note: fmax with external feedback is cal-
culated from measured tsu and tco.
Note: fmax with no feedback may be less
than 1/(twh + twl). This is to allow for a
clock duty cycle of other than 50%.
f
L O G I C
A R R A Y
LOGIC
ARRAY
max with No Feedback
t
su +
t
s u
t
h
R EG I S T E R
REGISTER
C L K
CLK
t
c o
t
su+
t
co)
11
Note: tcf is a calculated value, derived by sub-
tracting tsu from the period of fmax w/internal
feedback (tcf = 1/fmax - tsu). The value of tcf is
used primarily when calculating the delay from
clocking a register to a combinatorial output
(through registered feedback), as shown above.
For example, the timing from clock to a combi-
natorial output is equal to tcf + tpd.
Specifications GAL22V10
f
max with Internal Feedback 1/(
LOGIC
ARRAY
t
cf
t
pd
REGISTER
CLK
t
su+
t
cf)