74LVT16652ADL NXP Semiconductors, 74LVT16652ADL Datasheet

Bus Transceivers 3.3V 16-BIT BUS XCVR 3-S

74LVT16652ADL

Manufacturer Part Number

74LVT16652ADL

Description

Bus Transceivers 3.3V 16-BIT BUS XCVR 3-S

Manufacturer

NXP Semiconductors

Datasheet

1.74LVT16652ADL.pdf (21 pages)

Specifications of 74LVT16652ADL

Logic Type

BiCMOS

Logic Family

LVT

Number Of Channels Per Chip

Input Level

LVTTL

Output Level

LVTTL

Output Type

3-State

High Level Output Current

- 32 mA

Low Level Output Current

64 mA

Propagation Delay Time

2.7 ns

Supply Voltage (max)

3.6 V

Supply Voltage (min)

2.7 V

Maximum Operating Temperature

+ 85 C

Package / Case

SSOP-56

Function

Bus Transceiver / Register

Minimum Operating Temperature

- 40 C

Mounting Style

SMD/SMT

Number Of Circuits

Polarity

Non-Inverting

Lead Free Status / Rohs Status

Details

Other names

74LVT16652ADL,512

Available stocks

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Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

74LVT16652ADL

Manufacturer:

MAXIM

Quantity:

1 400

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1. General description

2. Features

The 74LVT16652A is a high-performance BiCMOS product designed for V

3.3 V. The device can be used as two 8-bit transceivers or one 16-bit transceiver.

Complimentary output enable (OEAB and OEBA) inputs are provided to control the

transceiver functions. Select control (SAB and SBA) inputs are provided to select whether

real-time or stored data is transferred. A LOW input level selects real-time data, and a

HIGH input level selects stored data. The circuitry used for select control eliminates the

typical decoding glitch that occurs in a multiplexer during the transition between stored

and real-time data.

Data on the A or B bus, or both, can be stored in the internal ﬂip-ﬂops by LOW-to-HIGH

transitions at the appropriate clock (CPAB or CPBA) inputs regardless of the levels on the

select control or output enable inputs. When SAB and SBA are in real-time transfer mode,

it is possible to store data without using the internal D-type ﬂip-ﬂops by simultaneously

enabling OEAB and OEBA. In this conﬁguration, each output reinforces its input. Thus,

when all other data sources to the two sets of bus lines are at high- impedance, each set

of bus lines remains at its last level conﬁguration.

74LVT16652A

3.3 V 16-bit bus transceiver/register; 3-state

Rev. 03 — 12 January 2005

16-bit bus interface

3-state buffers

Output capability: +64 mA and 32 mA

TTL input and output switching levels

Input and output interface capability to systems at 5 V supply

Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused

inputs

Live insertion and extraction permitted

Power-up reset

Power-up 3-state

No bus current loading when output is tied to 5 V bus

Latch-up protection exceeds 500 mA per JESD78

ESD protection:

MIL STD 883 method 3015: exceeds 2000 V

Machine model: exceeds 200 V

Product data sheet

operation at

Related parts for 74LVT16652ADL

74LVT16652ADL Summary of contents

Page 1

V 16-bit bus transceiver/register; 3-state Rev. 03 — 12 January 2005 1. General description The 74LVT16652A is a high-performance BiCMOS product designed for V 3.3 V. The device can be used as two 8-bit transceivers or one 16-bit ...

Page 2

... PLH t PHL I Ordering information Table 2: Ordering information Type number Package Temperature range Name 74LVT16652ADGG +85 C 74LVT16652ADL +85 C 9397 750 14402 Product data sheet Quick reference data Conditions propagation delay pF nAx to nBx or nBx to nAx propagation delay pF nAx to nBx or nBx to nAx input capacitance ...

Page 3

Philips Semiconductors 5. Functional diagram Fig 1. Logic symbol Fig 2. IEC Logic symbol 9397 750 14402 Product data sheet 3.3 V 16-bit bus transceiver/register; 3-state 1A0 1A1 1A2 1A3 2 1CPAB 3 1SAB 55 1CPBA ...

Page 4

Philips Semiconductors Fig 3. Logic diagram 9397 750 14402 Product data sheet nOEBA nOEAB nCPBA nSBA nCPAB nSAB CHANNELS nA0 nA1 nA2 nA3 nA4 nA5 nA6 nA7 Rev. 03 — 12 January 2005 74LVT16652A ...

Page 5

Philips Semiconductors 6. Pinning information 6.1 Pinning Fig 4. Pin conﬁguration 6.2 Pin description Table 3: Symbol 1OEAB 1CPAB 1SAB GND 1A0 1A1 V CC 1A2 9397 750 14402 Product data sheet 1 1OEAB 1CPAB 2 1SAB 3 4 GND ...

Page 6

Philips Semiconductors Table 3: Symbol 1A3 1A4 GND 1A5 1A6 1A7 2A0 2A1 2A2 GND 2A3 2A4 2A5 V CC 2A6 2A7 GND 2SAB 2CPAB 2OEAB 2OEBA 2CPBA 2SBA GND 2B7 2B6 V CC 2B5 2B4 2B3 GND 2B2 2B1 ...

Page 7

Philips Semiconductors Table 3: Symbol V CC 1B1 1B0 GND 1SBA 1CPBA 1OEBA 7. Functional description 7.1 Function table [1] Table 4: Function table Operating mode Input nOEAB nOEBA nCPAB Isolation L Store A and B data L Store A, ...

Page 8

Philips Semiconductors 7.2 Bus management function Figure 5 performed with the 74LVT16652A. The select pins determine whether data is stored or transferred through the device in real time. The output enable pins determine the direction of the data ﬂow. A ...

Page 9

Philips Semiconductors 8. Limiting values Table 5: In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol ...

Page 10

Philips Semiconductors 10. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter [ +85 C amb V input clamp voltage IK V HIGH-level ...

Page 11

Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I additional supply current CC per input pin C input capacitance control I pins C I/O pin capacitance I/O ...

Page 12

Philips Semiconductors Table 8: Dynamic characteristics GND = 2 Symbol Parameter t propagation delay PHL nAx to nBx or nBx to nAx propagation delay nCPAB ...

Page 13

Philips Semiconductors Table 9: Dynamic characteristics setup requirements GND = 2 Symbol Parameter [ +85 C amb t set-up time ...

Page 14

Philips Semiconductors Fig 7. Propagation delay nAx to nBx or nBx to nAx Fig 8. Propagation delay SBA to nAx or SAB to nBx Fig 9. 3-state output enable time to HIGH-level and output disable time from HIGH-level 9397 750 ...

Page 15

Philips Semiconductors Fig 10. 3-state output enable time to LOW-level and output disable time from LOW-level Fig 11. Data set-up and hold times 9397 750 14402 Product data sheet nOEBA V M nOEAB t PZL nAx or nBx V is ...

Page 16

Philips Semiconductors a. Input pulse deﬁnition b. Test circuit Fig 12. Load circuitry for switching times Table 10: Input V I 2.7 V 9397 750 14402 Product data sheet negative V M pulse ...

Page 17

Philips Semiconductors 13. Package outline TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. ...

Page 18

Philips Semiconductors SSOP56: plastic shrink small outline package; 56 leads; body width 7 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.4 2.35 mm ...

Page 19

Philips Semiconductors 14. Revision history Table 11: Revision history Document ID Release date 74LVT16652A_3 20050112 • Modiﬁcations: The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. • Product ...

Page 20

Philips Semiconductors 15. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualiﬁcation III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

Page 21

Philips Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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