CS4299-JQ Cirrus Logic Inc, CS4299-JQ Datasheet - Page 18
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CS4299-JQ
Manufacturer Part Number
CS4299-JQ
Description
Audio Codec 1ADC / 1DAC 18-Bit/20-Bit 48-Pin LQFP
Manufacturer
Cirrus Logic Inc
Type
PCMr
Datasheet
1.CS4299-JQ.pdf
(52 pages)
Specifications of CS4299-JQ
Package
48LQFP
Adc/dac Resolution
18/20 Bit
Number Of Channels
1ADC /1 DAC
Sampling Rate
48 KSPS
Number Of Adc Inputs
8
Number Of Dac Outputs
3
Number Of Dacs
1
Operating Supply Voltage
3.3|5 V
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3.3
The CS4299 is designed to handle SYNC protocol
violations. The following are situations where the
SYNC protocol has been violated:
•
•
•
18
18
The SYNC signal is not sampled high for exact-
ly 16 BIT_CLK clock cycles at the start of an
audio frame.
The SYNC signal is not sampled high on the
256th BIT_CLK clock period after the previous
SYNC assertion.
The SYNC signal goes active high before the
256th BIT_CLK clock period after the previous
AC-Link Protocol Violation - Loss of
SYNC
Upon loss of synchronization with the controller,
the CS4299 will ‘clear’ the Codec Ready bit in the
serial data input frame until two valid frames are
detected. During this detection period, the CS4299
will ignore all register reads and writes and will
discontinue the transmission of PCM capture data.
In addition, if the LOSM bit in the Misc. Crystal
Control Register (Index 60h) is ‘set’ (default), the
CS4299 will mute all analog outputs. If the LOSM
bit is ‘clear’, the analog outputs will not be muted.
SYNC assertion.
CS4299
CS4299
DS319PP6