CY7C09579V-100AC Cypress Semiconductor Corp, CY7C09579V-100AC Datasheet - Page 8

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CY7C09579V-100AC

Manufacturer Part Number
CY7C09579V-100AC
Description
SRAM Chip Sync Dual 3.3V 1.125M-Bit 32K x 36 12.5ns/5ns 144-Pin TQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C09579V-100AC

Package
144TQFP
Timing Type
Synchronous
Density
1.125 Mb
Data Rate Architecture
SDR
Typical Operating Supply Voltage
3.3 V
Address Bus Width
15 Bit
Number Of I/o Lines
36 Bit
Number Of Ports
2
Number Of Words
32K
AC Test Load and Waveforms
Document Number: 38-06054 Rev. *E
Notes
8. External AC Test Load Capacitance = 10 pF.
9. (Internal I/O pad Capacitance = 10 pF) + AC Test Load.
Output
(a) Normal Load (Load 1)
Z
0
= 50
C
All Input Pulses
[8]
R = 50 
7
6
5
4
3
2
1
20
V
[9]
TH
= 1.5 V
30
V
3.0 V
SS
60
(b) Load Derating Curve
3 ns
Capacitance (pF)
80 100
10%
90%
200
(b) Three-State Delay (Load 2)
Output
90%
10%
3 ns
C = 5 pF
CY7C09569V
CY7C09579V
3.3 V
R1 = 590 
R2 = 435 
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