A1460A-1PQ208C Actel, A1460A-1PQ208C Datasheet - Page 16

• Manufacturer Part Number: A1460A-1PQ208C
• Description: FPGA ACT 3 Family 6K Gates 848 Cells 125MHz 0.8um (CMOS) Technology 5V 208-Pin PQFP
• Manufacturer: Actel

Specifications of A1460A-1PQ208C

• Package: 208PQFP
• Family Name: ACT 3
• Device Logic Gates: 6000
• Device Logic Units: 848
• Device System Gates: 15000
• Number Of Registers: 768
• Maximum Internal Frequency: 125 MHz
• Typical Operating Supply Voltage: 5 V
• Maximum Number Of User I/os: 167
• Maximum Propagation Delay Time: 2.6 ns

Pa c kag e Th ermal C har a ct er i st i cs
The device junction to case thermal characteristic is jc, and
the junction to ambient air characteristic is ja. The thermal
characteristics for ja are shown with two different air flow
rates.
Po we r Dis sipation
Where:
An accurate determination of N and M is problematical
because their values depend on the design and on the system
I/O. The power can be divided into two components: static
and active.
1-190
Package Type
Ceramic Pin Grid Array
Ceramic Quad Flatpack
Plastic Quad Flatpack
Very Thin Quad Flatpack
Thin Quad Flatpack
Power Quad Flatpack
Plastic Leaded Chip Carrier
Plastic Ball Grid Array
Note:
1.
P = [I
I
outputs are changing.
I
I
V
N equals the number of outputs driving TTL loads to
V
M equals the number of outputs driving TTL loads to
V
Maximum Power Dissipation in Still Air for 160-pin PQFP package is 2.4 Watts, 208-pin PQFP package is 2.4 Watts, 100-pin PQFP package
is 1.6 Watts, 100-pin VQFP package is 1.9 Watts, 176-pin TQFP package is 2.5 Watts, 84-pin PLCC package is 2.2 Watts, 208-pin RQFP
package is 4.7 Watts, 225-pin BGA package is 3.2 Watts, 313-pin BGA package is 3.5 Watts.
CC standby
active
OL
OL
OL
OH
Absolute Maximum Power Allowed
, I
, V
.
CC standby
.
OH
OH
is the current flowing due to CMOS switching.
are TTL sink/source currents.
are TTL level output voltages.
1
is the current flowing when no inputs or
+ I
active
(V
CC
] * V
– V
OH
CC
) * M
+ I
Pin Count
OL
100
133
175
207
257
132
196
256
100
160
208
100
176
208
225
313
* V
84
OL
=
* N + I
Max. junction temp. ( C) – Max. ambient temp. ( C)
------------------------------------------------------------------------------------------------------------------------------
OH
*
0.4
(1)
20
20
20
20
20
13
13
13
13
10
10
12
11
12
10
10
jc
ja ( C/W)
Maximum junction temperature is 150 C.
A sample calculation of the absolute maximum power
dissipation allowed for a CPGA 175-pin package at
commercial temperature and still air is as follows:
Static Power Component
Actel FPGAs have small static power components that result
in lower power dissipation than PALs or PLDs. By integrating
multiple PALs/PLDs into one FPGA, an even greater
reduction in board-level power dissipation can be achieved.
The power due to standby current is typically a small
component of the overall power. Standby power is calculated
below for commercial, worst case conditions.
The static power dissipated by TTL loads depends on the
number of outputs driving high or low and the DC load
current. Again, this value is typically small. For instance, a
32-bit bus sinking 4 mA at 0.33 V will generate 42 mW with all
outputs driving low, and 140 mW with all outputs driving high.
The actual dissipation will average somewhere between as
I/Os switch states with time.
2mA
I
Still Air
CC
35
30
25
22
15
55
36
30
51
33
33
43
32
17
25
23
37
ja
300 ft/min
5.25 V
=
V
CC
17
15
14
13
30
24
18
40
26
26
35
25
13
28
19
17
150 C – 70 C
---------------------------------
8
ja
25 C/W
=
10.5 mW
3.2 W
Power
Units
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W