XC2VP100-6FF1704C Xilinx Inc, XC2VP100-6FF1704C Datasheet - Page 135
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XC2VP100-6FF1704C
Manufacturer Part Number
XC2VP100-6FF1704C
Description
FPGA Virtex-II Pro Family 99216 Cells 1200MHz 0.13um/90nm (CMOS) Technology 1.5V 1704-Pin FCBGA
Manufacturer
Xilinx Inc
Datasheet
1.XC2VP20-5FGG676C.pdf
(430 pages)
Specifications of XC2VP100-6FF1704C
Package
1704FCBGA
Family Name
Virtex-II Pro
Device Logic Units
99216
Number Of Registers
88192
Maximum Internal Frequency
1200 MHz
Typical Operating Supply Voltage
1.5 V
Maximum Number Of User I/os
1040
Ram Bits
8183808
Re-programmability Support
Yes
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FG256/FGG256 Fine-Pitch BGA Package
As shown in
package. The pins in each of these devices are identical. Following this table are the
Package Specifications (1.00mm
Table 5: FG256/FGG256 — XC2VP2 and XC2VP4
DS083 (v4.7) November 5, 2007
Product Specification
Bank
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
Table
5, XC2VP2 and XC2VP4 Virtex-II Pro devices are available in the FG256/FGG256 fine-pitch BGA
pitch).
IO_L74N_0/GCLK7P
IO_L74P_0/GCLK6S
IO_L75N_0/GCLK5P
IO_L75P_0/GCLK4S
IO_L75N_1/GCLK3P
IO_L75P_1/GCLK2S
IO_L74N_1/GCLK1P
IO_L74P_1/GCLK0S
IO_L69N_1/VREF_1
IO_L09N_1/VREF_1
IO_L03N_1/VREF_1
IO_L03P_0/VREF_0
IO_L09P_0/VREF_0
IO_L69P_0/VREF_0
IO_L01N_0/VRP_0
IO_L01P_0/VRN_0
Pin Description
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
IO_L02N_0
IO_L02P_0
IO_L03N_0
IO_L06N_0
IO_L06P_0
IO_L07P_0
IO_L09N_0
IO_L69N_0
IO_L69P_1
IO_L09P_1
IO_L07N_1
IO_L06N_1
IO_L06P_1
IO_L03P_1
www.xilinx.com
FG256/FGG256 Fine-Pitch BGA
Pin Number
C10
D10
D11
C12
D12
E10
E11
A14
A15
C2
C3
B3
C4
A2
A3
D5
C5
D6
E6
E7
D7
C7
D8
C8
B8
A8
A9
B9
C9
D9
Module 4 of 4
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