MT90870AG Zarlink, MT90870AG Datasheet - Page 27
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MT90870AG
Manufacturer Part Number
MT90870AG
Description
Switch Fabric 12K x 12K/8K x 4K 1.8V/3.3V 272-Pin BGA Tray
Manufacturer
Zarlink
Datasheet
1.MT90870AG.pdf
(86 pages)
Specifications of MT90870AG
Package
272BGA
Number Of Ports
32
Fabric Size
12K x 12K|8K x 4K
Switch Core
Non-Blocking|Blocking
Port Speed
2.048|4.096|8.192|16.384 Mbps
Operating Supply Voltage
1.8|3.3 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT90870AG2
Manufacturer:
ZARLINK
Quantity:
41
3.3
This feature is used to advance the output channel alignment of individual Local or Backplane output streams with
respect to the frame boundary. Each output stream has its own advancement value which can be programmed by
the output advancement registers. The output advancement selection is useful in compensating for various
parasitic loading on the serial data output pins.
3.3.1
The Local output advancement registers, LOAR0-15, are used to control the Local output advancement. The
advancement is determined with reference to the internal system clock rate (131.072 MHz). For 2 Mb/s, 4 Mb/s,
8 Mb/s or 16 Mb/s streams the advancement may be 0, -2 cycles, -4 cycles or -6 cycles, which converts to
approximately 0ns, -15 ns, -30 ns or -45 ns as shown in Figure 12.
3.3.2
The Backplane output advancement registers, BOAR0-31 are used to control the Backplane output advancement.
The advancement is determined with reference to the internal system clock rate (131.072 MHz). For 2 Mb/s,
4 Mb/s, 8 Mb/s or 16 Mb/s streams the advancement may be 0, -2 cycles, -4 cycles or -6 cycles, which converts to
Output Advancement Programming (Backplane and Local Output Streams)
BSTi0-31/LSTi0-15
BSTi0-31/LSTi0-15
BSTi0-31/LSTi0-15
BSTi0-31/LSTi0-15
BSTi0-31/LSTi0-15
BSTi0-31/LSTi0-15
BSTi0-31/LSTi0-15
Local Output Advancement Programming
Backplane Output Advancement Programming
Figure 11 - Backplane and Local Input Bit Delay Timing Diagram for Data Rate of 8 Mb/s
Bit Delay = 7
Bit Delay = 7
Bit Delay = 1/2
Bit Delay = 3/4
Bit Delay = 1/4
Bit Delay = 1
Bit Delay = 0
(Default)
FP8i
C8i
1/2
3/4
3
Ch126
3
Ch126
3
Ch127
2
3
Ch127
2
Ch127
3
2
Ch127
2
Ch127
2
1
2
1
1
2
1
1
0
1
0
0
1
0
0
7
0
7
0
7
Zarlink Semiconductor Inc.
7
Bit Delay, 1/4
7
6
Bit Delay, 1/2
7
6
MT90870
Bit Delay, 3/4
6
7
Bit Delay, 1
6
6
5
6
5
5
6
27
5
Ch127
5
Ch127
4
Ch0
5
4
4
5
Ch0
Ch0
4
Ch0
3
4
Ch0
3
4
3
4
3
3
2
3
2
2
3
2
2
1
2
1
1
2
1
1
0
1
0
0
1
0
0
7
0
7
Bit Delay, 7
7
0
Bit Delay, 7
7
7
6
7
6
6
7
6
1/2
6
Ch0
5
3/4
6
Ch0
5
Ch1
5
6
Ch1
5
Ch1
Ch1
5
4
Ch1
5
4
4
5
4
4
4
Data Sheet