PIC18F1220-H/SO Microchip Technology, PIC18F1220-H/SO Datasheet - Page 162
PIC18F1220-H/SO
Manufacturer Part Number
PIC18F1220-H/SO
Description
IC MCU 8BIT 4KB FLASH 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F1220-ISO.pdf
(308 pages)
Specifications of PIC18F1220-H/SO
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
18-SOIC (0.295", 7.50mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC18F1220/1320
17.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 17-2. The
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
at the analog input (due to pin leakage current). The
maximum recommended impedance for analog
sources is 2.5 kΩ. After the analog input channel is
selected (changed), the channel must be sampled for
at least the minimum acquisition time before starting a
conversion.
To
Equation 17-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
EQUATION 17-1:
EQUATION 17-2:
EXAMPLE 17-1:
DS39605F-page 160
T
V
or
T
T
T
T
Temperature coefficient is only required for temperatures > 25ºC. Below 25ºC, T
T
T
ACQ
C
ACQ
AMP
COFF
C
ACQ
DD
Note:
HOLD
). The source impedance affects the offset voltage
calculate
= Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
= T
= T
= 5 μs
= (Temp – 25ºC)(0.05 μs/ºC)
= -(C
= 5 μs + 1.25 μs + 9.61 μs
=
=
A/D Acquisition Requirements
SS
(50ºC – 25ºC)(0.05 μs/ºC)
1.25 μs
-(120 pF) (1 kΩ + 7 kΩ + 2.5 kΩ) ln(0.0004883) μs
9.61 μs
12.86 μs
SS
AMP
(ΔV
-(C
AMP
) impedance varies over the device voltage
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
HOLD
) impedance directly affect the time
HOLD
REF
+ T
+ T
)(R
the
C
– (ΔV
C
)(R
+ T
+ T
IC
IC
COFF
+ R
COFF
ACQUISITION TIME
A/D MINIMUM CHARGING TIME
REF
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
+ R
S
minimum
) and the internal sampling
SS
/2048)) • (1 – e
SS
+ R
+ R
S
) ln(1/2047) μs
S
HOLD
) ln(1/2048)
HOLD
acquisition
) must be allowed
(-T
. The sampling
C
/C
HOLD
(R
IC
+ R
time,
SS
+ R
S
))
)
Example 17-1 shows the calculation of the minimum
required acquisition time, T
based
assumptions:
C
Rs
Conversion Error
V
Temperature
V
17.2
If external voltage references are used instead of the
internal AV
ance of the V
considered. During acquisition, currents supplied by
these sources are insignificant. However, during
conversion, the A/D module sinks and sources current
through the reference sources.
In order to maintain the A/D accuracy, the voltage
reference source impedances should be kept low to
reduce voltage changes. These voltage changes occur
as reference currents flow through the reference
source impedance. The maximum recommended
impedance of the V
reference voltage sources is 250Ω.
HOLD
DD
HOLD
COFF
= 0 μs.
A/D V
on
DD
REF
and AV
the
REF
+ and V
=
=
≤
=
=
=
+ and V
following
SS
© 2007 Microchip Technology Inc.
REF
REF
120 pF
2.5 kΩ
1/2 LSb
5V → R
50°C (system max.)
0V @ time = 0
sources, the source imped-
- voltage sources must be
+ and V
ACQ
REF
SS
. This calculation is
application
- References
= 7 kΩ
REF
- external
system
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