PIC18F4585-H/PT Microchip Technology, PIC18F4585-H/PT Datasheet - Page 44

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PIC18F4585-H/PT

Manufacturer Part Number
PIC18F4585-H/PT
Description
IC MCU 8BIT 48KB FLASH 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet

Specifications of PIC18F4585-H/PT

Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
44-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC18F2585/2680/4585/4680
REGISTER 4-1:
DS39625C-page 42
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
RCON: RESET CONTROL REGISTER
bit 7
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (16CXXX Compatibility mode)
SBOREN: BOR Software Enable bit
If BOREN1:BOREN0 = 01:
1 = BOR is enabled
0 = BOR is disabled
If BOREN1:BOREN0 = 00, 10 or 11:
Bit is disabled and read as ‘0’.
Unimplemented: Read as ‘0’
RI: RESET Instruction Flag bit
1 = The RESET instruction was not executed (set by firmware only)
0 = The RESET instruction was executed causing a device Reset (must be set in software after
TO: Watchdog Time-out Flag bit
1 = Set by power-up, CLRWDT instruction or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down Detection Flag bit
1 = Set by power-up or by the CLRWDT instruction
0 = Set by execution of the SLEEP instruction
POR: Power-on Reset Status bit
1 = A Power-on Reset has not occurred (set by firmware only)
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = A Brown-out Reset has not occurred (set by firmware only)
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
Legend:
R = Readable bit
-n = Value at POR
R/W-0
Note 1: If SBOREN is enabled, its Reset state is ‘1’; otherwise, it is ‘0’.
Note 1: It is recommended that the POR bit be set after a Power-on Reset has been
IPEN
a Brown-out Reset occurs)
2: Brown-out Reset is said to have occurred when BOR is ‘0’ and POR is ‘1’ (assuming
2: The actual Reset value of POR is determined by the type of device Reset. See the
detected so that subsequent Power-on Resets may be detected.
that POR was set to ‘1’ by software immediately after POR).
notes following this register and Section 4.6 “Reset State of Registers” for
additional information.
SBOREN
R/W-1
(1)
U-0
Preliminary
W = Writable bit
‘1’ = Bit is set
(2)
(1)
R/W-1
RI
R-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TO
R-1
PD
© 2007 Microchip Technology Inc.
R/W-0
x = Bit is unknown
POR
(2)
R/W-0
BOR
bit 0

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