AD7609BSTZ Analog Devices Inc, AD7609BSTZ Datasheet - Page 9

• Manufacturer Part Number: AD7609BSTZ
• Description: 58T8900
• Manufacturer: Analog Devices Inc

Specifications of AD7609BSTZ

• Resolution (bits): 18bit
• Sampling Rate: 250kSPS
• Input Channel Type: Differential
• Data Interface: Serial, SPI
• Supply Voltage Range - Analog: 4.75V To 5.25V
• Rohs Compliant: Yes

Parameter
1
2
3
Timing Diagrams
Sample tested during initial release to ensure compliance. All input signals are specified with t
The delay between the CONVST x signals was measured as the maximum time allowed while ensuring a <40 LSB performance matching between channel sets.
A buffer is used on the data output pins for these measurements, which is equivalent to a load of 20 pF on the output pins.
t
t
t
27
28
29
FRSTDATA
CONVST A/
CONVST A/
CONVST A/
CONVST A/
CONVST B
CONVST B
CONVST B
CONVST B
DB[15:0]
RESET
RESET
DATA:
BUSY
BUSY
CS
RD
CS
CS
Min
INVALID
Limit at T
t
t
8
13
t
24
t
26
t
t
7
7
Typ
t
t
t
MIN
10
RESET
[17:2]
RESET
Figure 3. CONVST x Timing—Reading During a Conversion
t
t
Figure 2. CONVST x Timing—Reading After a Conversion
5
V1
5
, T
Figure 4. Parallel Mode Separate CS and RD Pulses
MAX
Max
22
29
20
27
29
t
t
1
1
t
[1:0]
11
V1
Unit
ns
ns
ns
ns
ns
Rev. 0 | Page 9 of 36
Description
Delay from RD falling edge to FRSTDATA low
V
V
Delay from 18
V
V
Delay from CS rising edge until FRSTDATA three-state enabled
DRIVE
DRIVE
DRIVE
DRIVE
t
[17:2]
27
V2
t
14
= 3.3 V to 5.25 V
= 2.3 V to 2.7 V
= 3.3 V to 5.25 V
= 2.3 V to 2.7 V
t
t
t
t
CYCLE
[1:0]
CYCLE
CONV
CONV
V2
t
t
th
3
R
3
= t
SCLK falling edge to FRSTDATA low
F
= 5 ns (30% to 70% of V
t
6
[17:2]
V8
t
15
t
4
DD
[1:0]
V8
) and timed from a voltage level of 1.6 V.
t
t
t
16
17
29
t
9
t
t
2
2
AD7609