AS5215OM-HMFP austriamicrosystems, AS5215OM-HMFP Datasheet - Page 15

IC ENCODER PROG 32-VQFN

AS5215OM-HMFP

Manufacturer Part Number
AS5215OM-HMFP
Description
IC ENCODER PROG 32-VQFN
Manufacturer
austriamicrosystems
Series
-r
Type
Linear, Rotary Encoder - Programmabler

Specifications of AS5215OM-HMFP

Mfg Application Notes
AS5000 Series Magnet Selection Guide AS5000 Series Magnets for Extended Vertical Range
Sensing Range
20mT ~ 80mT
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
28mA
Current - Output (max)
-
Output Type
Analog
Features
Programmable
Operating Temperature
-40°C ~ 150°C
Package / Case
32-VQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
AS5215-HQFT
AS5215-HQFT
AS5215-HQFT-OM
AS5215
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
8 Application Information
8.1 Sleep Mode
The target is to provide the possibility to reduce the total current consumption. No output signal will be provided when the IC is in sleep mode.
Enabling or disabling sleep mode is done by sending the SLEEP or WAKEUP commands via. the SSI interface. Analog blocks are powered
down with respect to fast wake up time.
8.2 SSI Interface
The setup for the device is handled by the digital interface. Each communication starts with the rising edge of the chip select signal. The
synchronization between the internal free running analog clock oscillator and the external used digital clock source for the digital interface is
done in a way that the digital clock frequency can vary in a wide range.
Table 8. SSI Interface Pin Description
Table 9. SSI Interface Parameter Description
www.austriamicrosystems.com/AS5215
Interface General at normal mode
Protocol: 5 command bit + 16 data input output
Command
Data
Interface General at extended mode
Protocol: 5 command bit + 46 data input output
Command
Data
Interface Modes
Normal read operation mode
Extended read operation mode
Normal write operation mode
Extended write operation mode
f_EZ_RW
f_EZ_PR
f_EZ_AR
Symbol
f_DCLK
OG
Bidirectional data input output
B
Clock frequency at normal operation
Chip select
Clock frequency at easy zap access
Clock frequency at easy zap analog
Clock frequency at easy zap read
DCLK
Port
program OTP
write access
Parameter
readback
Symbol
DCLK
DIO
CS
5 bit command: cmd<4:0> ← bit<21:16>
16 bit data: data<15:0> ← bit<15:0>
5 bit command: cmd<4:0> ← bit<50:46>
34 bit data: data<45:0> ← bit<45:0>
cmd<4:0> = <00xxx> → 1 DCLK per data bit
cmd<4:0> = <10xxx> → 1 DCLK per data bit
cmd<4:0> = <11xxx> → 4 DCLK per data bit
diode block needs a strict timing – the zap pulse
cmd<4:0> = <01xxx> → 4 DCLK per data bit
The nominal value for the clock frequency can
The nominal value for the clock frequency can
The nominal value for the clock frequency can
be derived from a 10MHz oscillator source.
Correct access to the programmable zener
be derived from a 10MHz oscillator source.
be derived from a 10MHz oscillator source.
Indicates the start of a new access cycle to the device
CS = LO → reset of the digital interface
Clock source for the communication over the digital interface
Command and data information over one single line
The first bit of the command defines a read or write access
20pF external load allowed.
is exact one period.
Revision 1.11
Notes
Function
no limit
no limit
no limit
Min
200
156.3
Typ
5
5
-
162.5
Max
650
6
6
Unit
MHz
15 - 26
kHz
kHz
kHz

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