USB3500-ABZJ Standard Microsystems (SMSC), USB3500-ABZJ Datasheet - Page 14

• Manufacturer Part Number: USB3500-ABZJ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of USB3500-ABZJ

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Package Type: QFN
• Rad Hardened: No
• Lead Free Status / Rohs Status: Compliant

Revision 1.0 (06-05-08)
PIN
43
44
45
46
47
48
49
50
51
52
53
54
55
56
GND FLAG
RXERROR
VBUSVLD
VDDA1.8
VDD3.3
VDD1.8
VDD3.3
VDD3.3
RBIAS
NAME
DMPD
DPPD
VSS
VSS
XO
XI
Table 3.1 USB3500 Pin Definitions (continued)
DIRECTION,
Ground
Ground
Analog,
Ground
Output,
Analog
Analog
Output
Output
CMOS
TYPE
Input,
Input
Input
N/A
N/A
N/A
N/A
N/A
DATASHEET
ACTIVE
LEVEL
High
High
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
14
Hi-Speed USB Host, Device or OTG PHY With UTMI+ Interface
DESCRIPTION
DP Pull-down Select. This signal enables the 15k
Ohm pull-down resistor on the DP line.
0: Pull-down resistor not connected to DP
1: Pull-down resistor connected to DP
DM Pull-down Select. This signal enables the 15k
Ohm pull-down resistor on the DM line.
0: Pull-down resistor not connected to DM
1: Pull-down resistor connected to DM
Receive Error. This output is clocked with the same
timing as the receive DATA lines and can occur at
anytime during a transfer.
0: Indicates no error.
1: Indicates a receive error has been detected.
PHY ground.
VBUS Valid. Indicates that the voltage on Vbus is
above the indicated threshold.
0: VBUS < V
1: VBUS > V
3.3V PHY Supply. Provides power for USB 2.0
Transceiver, UTMI+ Digital, Digital I/O, and
Regulators.
1.8V regulator output for digital circuitry on chip.
Place a 4.7uF low ESR capacitor near this pin and
connect the capacitor from this pin to ground.
Connect pin 49 to pin 27. See
Regulators and POR," on page
PHY ground.
Crystal pin. If using an external clock on XI this pin
should be floated.
Crystal pin. A 24MHz crystal is supported. The
crystal is placed across XI and XO. An external
24MHz clock source may be driven into XI in place
of a crystal.
1.8V regulator output for analog circuitry on chip.
Place a 0.1uF capacitor near this pin and connect
the capacitor from this pin to ground. In parallel,
place a 4.7uF low ESR capacitor near this pin and
connect the capacitor from this pin to ground. See
Section 6.6, "Internal Regulators and
3.3V PHY Supply. Provides power for USB 2.0
Transceiver, UTMI+ Digital, Digital I/O, and
Regulators.
3.3V PHY Supply. Should be connected directly to
pin 54.
External 1% bias resistor. Requires a 12KΩ resistor
to ground.
Ground. The flag must be connected to the ground
plane.
VbusVld
VbusVld
Section 6.6, "Internal
27.
POR".
SMSC USB3500
Datasheet