STM32F407IEH6 STMicroelectronics, STM32F407IEH6 Datasheet - Page 103
![Microcontrollers (MCU) ARM M4 512 FLASH 168 Mhz 192kB SRAM](/photos/40/79/407976/bga176_sml.jpg)
STM32F407IEH6
Manufacturer Part Number
STM32F407IEH6
Description
Microcontrollers (MCU) ARM M4 512 FLASH 168 Mhz 192kB SRAM
Manufacturer
STMicroelectronics
Datasheet
1.STM32F407ZGT6.pdf
(167 pages)
Specifications of STM32F407IEH6
Core
ARM Cortex M4
Processor Series
STM32F4
Data Bus Width
32 bit
Maximum Clock Frequency
168 MHz
Program Memory Size
512 KB
Data Ram Size
192 KB
On-chip Adc
Yes
Number Of Programmable I/os
140
Number Of Timers
10
Operating Supply Voltage
1.7 V to 3.6 V
Package / Case
UFBGA-176
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, I2C, I2S, SPI, UART
Program Memory Type
Flash
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F407IEH6
Manufacturer:
ST
Quantity:
1 500
Company:
Part Number:
STM32F407IEH6
Manufacturer:
STMicroelectronics
Quantity:
10 000
STM32F405xx, STM32F407xx
5.3.17
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, R
Unless otherwise specified, the parameters given in
performed under the ambient temperature and V
in
Table 47.
1. Guaranteed by design, not tested in production.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution
Figure 35. Recommended NRST pin protection
2. The reset network protects the device against parasitic resets.
3. The user must ensure that the level on the NRST pin can go below the V
V
V
V
T
V
V
Table
NF(NRST)
IH(NRST)
IL(NRST)
NRST_OUT
Symbol
F(NRST)
hys(NRST)
to the series resistance must be minimum
Table
R
PU
47. Otherwise the reset is not taken into account by the device.
11.
(1)
(1)
(1)
(1)
PU
NRST pin characteristics
(see
NRST Input low level voltage
NRST Input high level voltage
NRST Schmitt trigger voltage
hysteresis
Weak pull-up equivalent resistor
NRST Input filtered pulse
NRST Input not filtered pulse
Generated reset pulse duration
Table
44).
Parameter
Doc ID 022152 Rev 2
(~10% order)
(2)
.
Reset source
V
Conditions
DD
V
DD
Internal
IN
> 2.7 V
supply voltage conditions summarized
=
Table 47
V
SS
are derived from tests
IL(NRST)
–0.5
Min
300
30
20
2
-
-
Electrical characteristics
max level specified in
Typ
200
40
-
-
-
-
-
V
DD
Max
100
0.8
50
-
-
-
+0.5
103/167
Unit
mV
kΩ
ns
ns
µs
V