STM32F407IEH6 STMicroelectronics, STM32F407IEH6 Datasheet - Page 105
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STM32F407IEH6
Manufacturer Part Number
STM32F407IEH6
Description
Microcontrollers (MCU) ARM M4 512 FLASH 168 Mhz 192kB SRAM
Manufacturer
STMicroelectronics
Datasheet
1.STM32F407ZGT6.pdf
(167 pages)
Specifications of STM32F407IEH6
Core
ARM Cortex M4
Processor Series
STM32F4
Data Bus Width
32 bit
Maximum Clock Frequency
168 MHz
Program Memory Size
512 KB
Data Ram Size
192 KB
On-chip Adc
Yes
Number Of Programmable I/os
140
Number Of Timers
10
Operating Supply Voltage
1.7 V to 3.6 V
Package / Case
UFBGA-176
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, I2C, I2S, SPI, UART
Program Memory Type
Flash
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F407IEH6
Manufacturer:
ST
Quantity:
1 500
Company:
Part Number:
STM32F407IEH6
Manufacturer:
STMicroelectronics
Quantity:
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STM32F405xx, STM32F407xx
5.3.19
Table 49.
1. TIMx is used as a general term to refer to the TIM1, TIM8, TIM9, TIM10, and TIM11 timers.
Communications interfaces
I
Unless otherwise specified, the parameters given in
performed under the ambient temperature, f
conditions summarized in
The STM32F405xx and STM32F407xx I
standard I
SCL are mapped to are not “true” open-drain. When configured as open-drain, the PMOS
connected between the I/O pin and V
The I
characteristics
and SCL) .
2
t
MAX_COUNT
C interface characteristics
t
COUNTER
Symbol
t
Res
res(TIM)
f
2
EXT
C characteristics are described in
TIM
2
C communication protocol with the following restrictions: the I/O pins SDA and
Characteristics of TIMx connected to the APB2 domain
Timer resolution time
Timer external clock
frequency on CH1 to CH4
Timer resolution
16-bit counter clock
period when internal clock
is selected
Maximum possible count
for more details on the input/output alternate function characteristics (SDA
Parameter
Table
Doc ID 022152 Rev 2
11.
DD
AHB/APB2
prescaler distinct
from 1, f
168 MHz
AHB/APB2
prescaler = 1,
f
APB2 = 84 MHz
f
TIMxCLK
TIMxCLK
2
Table
is disabled, but is still present.
C interface meets the requirements of the
Conditions
PCLK1
TIMxCLK
= 84 MHz
50. Refer also to
= 168 MHz
frequency and V
Table 50
=
5.95
11.9
Min
1
1
0
0
1
-
-
are derived from tests
Section 5.3.16: I/O port
Electrical characteristics
DD
f
TIMxCLK
supply voltage
65536
32768
(1)
Max
84
16
-
-
-
-
/2
t
t
t
t
TIMxCLK
TIMxCLK
TIMxCLK
TIMxCLK
105/167
MHz
MHz
Unit
ns
ns
bit