SI3200-KS Silicon Laboratories Inc, SI3200-KS Datasheet - Page 8

IC LINEFEED INTRFC 100V 16SOIC

SI3200-KS

Manufacturer Part Number
SI3200-KS
Description
IC LINEFEED INTRFC 100V 16SOIC
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets

Specifications of SI3200-KS

Package / Case
16-SOIC (3.9mm Width)
Function
Subscriber Line Interface Concept (SLIC), CODEC
Interface
GCI, PCM, SPI
Number Of Circuits
2
Voltage - Supply
3.3V, 5V
Current - Supply
110µA
Power (watts)
941mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Includes
Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
Product
SLIC
Supply Voltage (min)
3.13 V
Supply Current
0.11 mA, 8.4 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Channels
2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
SI3200-KS
Manufacturer:
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Quantity:
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Manufacturer:
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Quantity:
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Part Number:
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Si3232
8
Table 4. AC Characteristics
(V
Parameter
TX Full Scale Output
RX Full Scale Input
Analog Input/Output Common
Mode Voltage
Overload Level
Overload Compression
Single Frequency Distortion
Signal-to-(Noise + Distortion)
Ratio
Intermodulation Distortion
Gain Accuracy
Gain Distortion vs. Frequency
Gain Tracking
Crosstalk between channels
TX or RX to TX
TX to RX to RX
2-Wire Return Loss
Notes:
DD
1. The input signal level should be 0 dBm0 for frequencies greater than 100 Hz. For 100 Hz and below, the level should
2. Analog signal measured as V
3. V
4. The level of any unwanted tones within the bandwidth of 0 to 4 kHz will not exceed –55 dBm.
5. The OBIAS and ABIAS registers program the dc bias current through the SLIC in the on-hook transmission and off-
, V
2
DD1
be –10 dBm0. The output signal magnitude at any other frequency will be smaller than the maximum value
specified.
hook active conditions, respectively. This per-pin total current setting should be selected such that it can
accommodate the sum of the metallic and longitudinal currents through each of the TIP and RING leads for a given
application.
DD
–V
=
DD4
3.3 V, V
2
=
3.13 to 3.47 V, T
3
BAT
=
–52 V, no fuse resistors, R
1
2-Wire to 4-Wire or 4-Wire to 2-Wire,
2-wire to 4-wire or 4-wire to 2-wire:
A
Active off-hook, and OHT, any Z
TIP
ATX stage = 0 dB, THD = 1.5%
=
0 to 70 °C for K-Grade, –40 to 85 °C for B-Grade)
VRXP–VRXN, ARX = 0 dB
– V
1014 Hz, Any gain setting
2-wire to 4-wire to 2-wire:
reference level –10 dBm
RING
1014 Hz sine wave,
300 Hz to 3.4 kHz
300 Hz to 3.4 kHz
200 Hz to 3.4 kHz
–37 dB to –50 dB
–50 dB to –60 dB
ARX = –3.52 dB
ARX = –6.02 dB
200 Hz–3.4 kHz
200 Hz–3.4 kHz
200 Hz–3.4 kHz
Test Condition
3 dB to –37 dB
CMTXSEL = 1
CMTXSEL = 0
–3 dB corners
VTXP–XTXN
. Assumes ideal line impedance matching.
signal level:
TX/RX Performance
Preliminary Rev. 0.96
0 dBm0,
L
=
600 Ω, Z
S
=
600 Ω synthesized using RS register coefficients.
T
Figure 4
–0.25
0.25
0.01
Min
0.1
0.6
2.5
26
0
0
Typ
–74
–74
–74
1.5
30
V
V
DD
+0.25
±0.25
DD
Max
±0.5
±1.0
V
V
–68
–65
–68
–41
–75
–75
1.5
10
–0.25
DD
DD
–0.1
Unit
V
kHz
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
V
V
V
V
V
V
PK

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