SI3220-BQ Silicon Laboratories Inc, SI3220-BQ Datasheet - Page 41

• Manufacturer Part Number: SI3220-BQ
• Description: IC SLIC/CODEC DUAL-CH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3220-BQ

• Package / Case: *
• Function: Subscriber Line Interface Concept (SLIC), CODEC
• Interface: GCI, PCM, SPI
• Number Of Circuits: 2
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 65mA
• Power (watts): 941mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
• Product: Telecom
• Supply Voltage (min): 3.13 V
• Supply Current: 22 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Channels: 2
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

the load impedance in REN. The following equation can
be used to determine the TIP-RING ringing amplitude
required for a specific load and loop condition.
where
Ringing Waveform
Ringing Active Timer Enable
Ringing Inactive Timer Enable
Ringing Oscillator Enable
Monitor
Ringing Oscillator Active Timer
Ringing Oscillator Inactive
Timer
Linefeed Control
(Initiates Ringing State)
On-Hook Line Voltage
Ringing Voltage Offset
Ringing Frequency
Ringing Amplitude
Figure 25. Simplified Loop Circuit During
R
V
OUT
V
TERM
RING
Parameter
=
V
RING
Table 25. Register and RAM Locations Used for Ringing Generation
×
Ringing
R
-------------------------------------------------------------------- -
(
LOOP
R
LOAD
+
R
R
LOAD
LOOP
R
RINGTALO/
RINGFRHI/
RINGFRLO
Mnemonic
RINGTILO/
LINEFEED
RINGCON
RINGCON
RINGCON
RINGCON
RINGTAHI
RINGAMP
Register/
RINGTIHI
LOAD
RINGOF
RAM
VOC
+
R
OUT
Preliminary Rev. 0.91
)
V
TERM
+
–
RINGFRLO[14:3]
RINGFRHI[14:3]/
RINGAMP[15:0]
Register/RAM
RINGOF[15:0]
RINGTA[15:0]
RINGTI[15:0]
VOC[15:0]
RINGEN
LF[2:0]
TRAP
TAEN
TIEN
Bits
When ringing longer loop lengths, adding a dc offset
voltage is necessary to reliably detect a ring trip
condition (off-hook phone). Adding dc offset to the
ringing signal decreases the maximum possible ringing
amplitude. Adding significant dc offset also increases
the power dissipation in the Si3200 and may require
additional airflow or modified PCB layout to maintain
acceptable operating temperatures in the line feed
circuitry. The Dual ProSLIC chipset automatically
applies and removes the ringing signal during V
crossing periods to reduce noise and crosstalk to
adjacent lines. Table 25 provides a list of registers
required for internal ringing generation
R
LOOP
Sinusoid/Trapezoid
Enabled/Disabled
Enabled/Disabled
=
Enabled/Disabled
Programmable
0 to 160.173 V
(
0.09Ω per foot for 26AWG wire
4 to 100 Hz
0 to 63.3 V
0 to 63.3 V
0 to 8.19 s
0 to 8.19 s
000 to 111
R
Range
R
LOAD
OUT
Si3220/Si3225
=
=
320Ω
7000Ω
----------------- -
#REN
Resolution
(LSB Size)
(4.907 mV)
(4.907 mV)
(4.907 mV)
1.005 V
1.005 V
628 mV
125 µ s
125 µ s
N/A
N/A
N/A
N/A
N/A
)
OC
41
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