FT2232HQ - REEL FTDI, Future Technology Devices International Ltd, FT2232HQ - REEL Datasheet - Page 40

IC USB UART/FIFO DUAL HS 64-QFN

FT2232HQ - REEL

Manufacturer Part Number
FT2232HQ - REEL
Description
IC USB UART/FIFO DUAL HS 64-QFN
Manufacturer
FTDI, Future Technology Devices International Ltd
Series
USBmadeEZ-FIFOr
Datasheet

Specifications of FT2232HQ - REEL

Features
USB to UART and/or FIFO, SPI, I2C, JTAG
Number Of Channels
2, DUART
Fifo's
4096 Byte
Protocol
RS-232, RS-422, RS-485
Voltage - Supply
3 V ~ 3.6 V
With Parallel Port
Yes
With Auto Flow Control
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
64-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
768-1025-2
FT2232HQ - REEL
Document No.: FT_000061
FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 2.10
Clearance No.: FTDI#77
4.10 Synchronous and Asynchronous Bit-Bang Interface Mode
Description
The FT2232H channel A or channel B can be configured as a bit-bang interface. There are two types of
bit-bang modes: synchronous and asynchronous.
Asynchronous Bit-Bang Mode
Asynchronous Bit-Bang mode is the same as BM-style Bit-Bang mode, except that the internal RD# and
WR# strobes (RDSTB# and WRSTB#) are now brought out of the device to allow external logic to be
clocked by accesses to the bit-bang IO bus.
On either or both channels any data written to the device in the normal manner will be self clocked onto
the data pins (those which have been configured as outputs). Each pin can be independently set as an
input or an output. The rate that the data is clocked out at is controlled by the baud rate generator.
For the data to change there has to be new data written, and the baud rate clock has to tick. If no new
data is written to the channel, the pins will hold the last value written.
Synchronous Bit-Bang Mode
The synchronous Bit-Bang mode will only update the output parallel port pins whenever data is sent from
the USB interface to the parallel interface. When this is done, the WRSTB# will activate to indicate that
the data has been read from the USB Rx FIFO buffer and written out on the pins. Data can only be
received from the parallel pins (to the USB Tx FIFO interface) when the parallel interface has been
written to.
With Synchronous Bit-Bang mode data will only be sent out by the FT2232H if there is space in the
FT2232H USB TXFIFO for data to be read from the parallel interface pins. This Synchronous Bit-Bang
mode will read the data bus parallel I/O pins first, before it transmits data from the USB RxFIFO. It is
therefore 1 byte behind the output, and so to read the inputs for the byte that you have just sent,
another byte must be sent.
For example :-
(1) Pins start at 0xFF
Send 0x55,0xAA
Pins go to 0x55 and then to 0xAA
Data read = 0xFF,0x55
(2) Pins start at 0xFF
Send 0x55,0xAA,0xAA
(repeat the last byte sent)
Pins go to 0x55 and then to 0xAA
Data read = 0xFF,0x55,0xAA
Synchronous Bit-Bang Mode differs from Asynchronous Bit-Bang mode in that the device parallel output
is only read when the parallel output is written to by the USB interface. This makes it easier for the
controlling program to measure the response to a USB output stimulus as the data returned to the USB
interface is synchronous to the output data.
Asynchronous Bit-Bang mode is enabled using Set Bit Bang Mode driver command. A hex value of 1 will
enable Asynchronous Bit-Bang mode.
Synchronous Bit-Bang mode is enabled using Set Bit Bang Mode driver command. A hex value of 4 will
enable Synchronous Bit-Bang mode.
See application note AN2232-02, “Bit Mode Functions for the FT2232” for more details and
examples of using the bit-bang modes.
An example of the synchronous bi-bang mode timing is shown in Figure 4.19
Copyright © 2010 Future Technology Devices International Limited
40

Related parts for FT2232HQ - REEL