FT2232HQ - REEL FTDI, Future Technology Devices International Ltd, FT2232HQ - REEL Datasheet - Page 41

IC USB UART/FIFO DUAL HS 64-QFN

FT2232HQ - REEL

Manufacturer Part Number
FT2232HQ - REEL
Description
IC USB UART/FIFO DUAL HS 64-QFN
Manufacturer
FTDI, Future Technology Devices International Ltd
Series
USBmadeEZ-FIFOr
Datasheet

Specifications of FT2232HQ - REEL

Features
USB to UART and/or FIFO, SPI, I2C, JTAG
Number Of Channels
2, DUART
Fifo's
4096 Byte
Protocol
RS-232, RS-422, RS-485
Voltage - Supply
3 V ~ 3.6 V
With Parallel Port
Yes
With Auto Flow Control
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
64-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
768-1025-2
FT2232HQ - REEL
Figure 4.19 Synchronous Bit-Bang Mode Timing Interface Example
Table 4.10 Synchronous Bit-Bang Mode Timing Interface Example Timings
WRSTB# = this output indicates when new data has been written to the I/O pins from the Host PC (via
the USB interface).
RDSTB# = this output rising edge indicates when data has been read from the I/O pins and sent to the
Host PC (via the USB interface).
The WRSTB# goes active in t4. The WRSTB# goes active when data is read from the USB RXFIFO (i.e.
sent from the PC). The RDSTB# goes inactive when data is sampled from the pins and written to the USB
TXFIFO (i.e. sent to the PC). The SETUP command to the FT2232H is used to setup the bit-mode. This
command also contains a byte wide data mask to set the direction of each bit. The direction on each pin
doesn‟t change unless a new SETUP command is used to modify the direction.
The WRSTB# and RDSTB# strobes are only a guide to what may be happening depending on the
direction of the bus. For example if all pins are configured as inputs, it is still necessary to write to these
pins in order to get the FT2232H to read those pins even though the data written will never appear on
the pins.
Signals and data-flow are illustrated in Figure 4.20
Figure 4.20 Bit-bang Mode Dataflow Illustration Diagram.
Name
t1
t2
t3
t4
t5
t6
USB
WRSTB#
RDSTB#
Current pin state is read
RDSTB# is set inactive and data on the paralle I/O pins is read and sent to the USB host.
RDSTB# is set active again, and any pins that are output will change to their new data
1 clock cycle to allow for data setup
WRSTB# goes active. This indicates that the host PC has written new data to the I/O parallel data pins
WRSTB# goes inactive
Description
USB Rx
USB Tx
Buffer
FIFO/
Buffer
FIFO/
Copyright © 2010 Future Technology Devices International Limited
FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC
Parallel I/O
WRSTB#
RDSTB#
data
I/O pins
Parallel
Document No.: FT_000061
Clearance No.: FTDI#77
Datasheet Version 2.10
41

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