LTC4280IUFD#TR Linear Technology, LTC4280IUFD#TR Datasheet - Page 19

• Manufacturer Part Number: LTC4280IUFD#TR
• Manufacturer: Linear Technology

Specifications of LTC4280IUFD#TR

• Lead Free Status / Rohs Status: Supplier Unconfirmed

APPLICATIONS INFORMATION
For a start-up time of 4ms with a 2x safety margin we
choose:
For an overcurrent fault fi lter time of 5ms we choose:
The UV and OV resistor string values can be solved in the
following method. First pick R3 based on I
1.235V/R3 at the edge of the OV rising threshold, where
I
In our case we choose R3 to be 3.4kΩ to give a resistor
string current below 100μA. Then solving the equations
results in R2 = 1.16kΩ and R1 = 34.6kΩ.
The FB divider is solved by picking R8 and solving for R7,
choosing 3.57kΩ for R8 we get:
resulting in R7 = 30kΩ.
A 0.1μF capacitor, C
supply glitches from turning off the GATE via UV or OV.
The address is set with the help of Table 1, which indicates
binary address 1010011 corresponds to address 19.
Address 19 is set by setting ADR2 high, ADR1 open and
ADR0 high.
Next the value of R5 and R6 are chosen to be the default
values 10Ω and 15k as discussed previously.
STRING
C
R2 =
R1 =
R7 =
C
C
F
TIMER
TIMER
= t
> 40μA. Then solve the following equations:
FILTER
V
V
V
V
OV(OFF)
UV(ON)
PWRGD(UP)
=
=
UV(ON)
FB
UV
2
12 3
TH(RISING)
/123ms/μF ≅ 47nF
•
TH(RI
.
12 3
8
t
• (
ms
ms
STARTUP
.
• R3 •
R
S S ING)
F
ms μF
/μ μ F
3
, is placed on the UV pin to prevent
•
+
R
/
R
8
≅ 0 68
OV
2
UV
–
)
.
R
TH H (FALLING)
–
TH(RISING)
8
R
μF
3
–
R
2
– R3
STRING
being
In addition a 0.1μF ceramic bypass capacitor is placed on
the INTV
Layout Considerations
To achieve accurate current sensing, a Kelvin connection
is required. The minimum trace width for 1oz copper
foil is 0.02" per amp to make sure the trace stays at a
reasonable temperature. Using 0.03" per amp or wider
is recommended. Note that 1oz copper exhibits a sheet
resistance of about 530μΩ/
quickly in high current applications. To improve noise
immunity, put the resistive dividers to the UV, OV and FB
pins close to the device and keep traces to V
short. It is also important to put the bypass capacitor for
the INTV
and GND. A 0.1μF capacitor from the UV pin (and OV pin
through resistor R2) to GND also helps reject supply noise.
Figure 4 shows a layout that addresses these issues. Note
that a surge suppressor, Z1, is placed between supply and
ground using wide traces.
Z1
CC
CC
pin.
pin, C3, as close as possible between INTV
SENSE RESISTOR R
C
F
Figure 5. Recommended Layout
R1
R2
R3
UV
OV
FILTER
GND
ON
EN
SDAO
S
®
. Small resistances add up
LTC4280UFD
I
LOAD
C3
I
LOAD
LTC4280
INTV
TIMER
ADR2
ADR1
GPIO
ADIN
FB
CC
DD
and GND
19
R8
4280 F05
4280f
CC