CY8C5468LTI-037 Cypress Semiconductor Corp, CY8C5468LTI-037 Datasheet - Page 3
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CY8C5468LTI-037
Manufacturer Part Number
CY8C5468LTI-037
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY8C5468LTI-037.pdf
(105 pages)
Specifications of CY8C5468LTI-037
Lead Free Status / Rohs Status
Compliant
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1. Architectural Overview
Introducing the CY8C54 family of ultra low power, flash Programmable System-on-Chip (PSoC) devices, part of a scalable 8-bit
PSoC 3 and 32-bit PSoC 5 platform. The CY8C54 family provides configurable blocks of analog, digital, and interconnect circuitry
around a CPU subsystem. The combination of a CPU with a flexible analog subsystem, digital subsystem, routing, and I/O enables
a high level of integration in a wide variety of consumer, industrial, and medical applications.
Document Number: 001-66238 Rev. *A
1.8 to 3.6 V
( Optional )
4
32.768 KHz
( Optional )
to
(Optional )
25 MHz
System Wide
Clocking System
Resources
Power Management
Xtal
Osc
IMO
1.8V LDO
POR and
Power
System
Timer
Wake
Sleep
LVD
SMP
RTC
WDT
ILO
and
Digital Interconnect
EEPROM
8- Bit
Timer
I 2C Slave
PRELIMINARY
UART
Figure 1-1. Simplified Block Diagram
Temperature
LCD Direct
Memory System
UDB
UDB
UDB
UDB
(TIA, PGA, Mixer etc)
CapSense
Sensor
Drive
4 x SC/CT Blocks
Universal Digital Block Array (24 x UDB)
Quadrature Decoder
8- Bit SPI
UDB
UDB
UDB
UDB
FLASH
SRAM
4 x DAC
Digital
12- Bit SPI
Logic
12- Bit PWM
Block
Filter
UDB
UDB
UDB
UDB
Digital System
16-Bit
PWM
System Bus
Timer
16- Bit PRS
8- Bit
Analog Interconnect
UDB
UDB
UDB
UDB
Logic
PSoC
Analog System
Cortex M3 CPU
ADCs
Controller
8051 or
Cache
UDB
UDB
UDB
UDB
CPU System
®
UDB
UDB
UDB
UDB
ADC
SAR
2 x
5: CY8C54 Family Datasheet
Controller
Interrupt
PHUB
DMA
Counter
Timer
PWM
4 x
CAN
2.0
Opamp
CMP
Program &
4 x
4 x
Debug
Program
Debug
Trace
+
+
-
-
FS USB
Master/
Slave
I2C
2.0
USB
PHY
Opamp
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