LC7073 Sanyo Semiconductor Corporation, LC7073 Datasheet

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LC7073

Manufacturer Part Number
LC7073
Description
Error detection and correction LSis for RDS demodulator
Manufacturer
Sanyo Semiconductor Corporation
Datasheet

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Preliminary
Overview
The LC7073 and LC7073M are error detection and correc-
tion ICs that provide an easy interface to the LA2230 and
LA2231 radio data system (RDS) demodulators. Both de-
vices incorporate an on-chip oscillator that connects directly
to an external ceramic resonator.
The LC7073 and LC7073M provide group synchroniza-
tion, selectable error detection and correction, output clock
polarity selection, a block data start signal output and an
error output that signals error correction failures.
The LC7073 and LC7073M operate from a 5 V supply and
are available in 18-pin DIPs and MFPs, respectively.
Features
• RDS error detection and correction.
• Easy interface with LA2230 and LA2231 demodulator
• Serial data transfer system.
• Group synchronization capability.
• Selectable error detection and correction.
• Output clock polarity selection.
• Block data start output.
• Error output.
• On-chip oscillator.
• 5 V supply.
• 18-pin DIP (LC7073) and 18-pin MFP (LC7073M).
Pin Assignment
Ordering number:ENN
ICs.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
*
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
3932
SANYO Electric Co.,Ltd. Semiconductor Company
Top view
Error Detection and Correction ICs
Package Dimensions
unit:mm
3007B-DIP18
unit:mm
3095-MFP18
(1.84)
1
18
18
1
2.54
for RDS Demodulators
0.5
12.6
0.35
24.0
71901TN (KT)/5281JN(US) No.3932–1/9
[LC7073M]
LC7073, 7073M
[LC7073]
1.27
1.2
10
9
1.22
9
10
0.15
SANYO : DIP18
SANYO : MFP18
CMOS IC

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LC7073 Summary of contents

Page 1

... The LC7073 and LC7073M operate from supply and are available in 18-pin DIPs and MFPs, respectively. Features • RDS error detection and correction. ...

Page 2

... Block Diagram Pin Function LC7073, 7073M Continued on next page. No.3932–2 ...

Page 3

... Continued from preceding page LC7073, 7073M No.3932–3 ...

Page 4

... Note 1. Idle pins have output currents less than 1mA. 2. Oscillator running =0mA LC7073, 7073M , SS1 SS2 SS3 DIP: Ta=–40 to +85˚ MFP: Ta=–40 to +85˚ SS1 SS1 SS2 SS3 =– µ =– µ – – – 0 – – 0 – – – ...

Page 5

... Timing Diagrams The relationship between the LC7073 and LC7073M input data (RDS demodulated data output) and output data is shown in figure 1. Note The dotted lines show data start (DST) pulses when the data start control (DSTCTL) is LOW. The serial output data is delayed by one block between input and output. The error (ERR) and correction (COR) signals remain active if errors are detected continually ...

Page 6

... CKPOL Input Read Delay CKPOL is read 1 ms after a reset as shown in figure 3. LC7073, 7073M Figure 2. Serial output data format and timing Figure 3. CKPOL input read delay No.3932–6/9 ...

Page 7

... Table 2. Oscillator capacitor values LC7073, 7073M Figure 4. Input read during sync detection Figure 5. Input read after sync detection ± ± OSC1 OSC2 C1 C2 Ceramic resonator Figure 6. Oscillator circuit V DD 4.5V OSC t CFS t CFS is the oscillator stabilization time Figure 7. Oscillator stabilization delay 0V No.3932–7/9 ...

Page 8

... Offset Words E and F The LC7070N/LC7070NM/LC7071NM recognizes offset words E and F and performs group sync detection. The LC7073/ LC7073M does not recognize offset words E and F–it only detects C’ and D. Input Data Bits If all data bits are 0, the LC7070N/LC7070NM/LC7071NM only recognizes offset word E. The LC7073/LC7073M does not recognize the offset word E block ...

Page 9

... If sync detection occurs during the first block (offset A), the LC7073/LC7073M starts data output with the second block (offset B). If sync detection occurs during the second or third block (offset B or C), and finishes before the end of the fourth block (offset D), the LC7073/LC7073M starts data output with the first block (offset A) of the second group. ...

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