MB91F362GB Fujitsu, MB91F362GB Datasheet

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MB91F362GB

Manufacturer Part Number
MB91F362GB
Description
Fujitsu Media Devices Limited [32-bit RISC Microcontroller]
Manufacturer
Fujitsu
Datasheet

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FUJITSU SEMICONDUCTOR
32-bit RISC Microcontroller
CMOS
FR50 MB91360G Series
MB91FV360GA/F362GB/F369GA/F364G/F365GB/
F367GB/F366GB/F368GB/366GA/F376G
DESCRIPTION
The MB91360G series is a standard microcontroller containing a wide range of I/O peripherals and bus control
functions. The MB91360G series features a 32-bit RISC CPU (FR50) core and is suitable for embedded control
applications requiring high-performance and high-speed CPU processing. Also, Internal memories to improve
the execution speed of the CPU.
FEATURES
• Execution time : down to 15.6 ns (64 MHz)
PACKAGES
DATA SHEET
401-pin Ceramics PGA
160-pin plastic QFP
(PGA-401C-A02)
(FPT-160P-M15)
120-pin plastic LQFP
208-pin plastic QFP
(FPT-120P-M21)
(FPT-208P-M04)
DS07-16401-4E
(Continued)

Related parts for MB91F362GB

MB91F362GB Summary of contents

Page 1

... FUJITSU SEMICONDUCTOR DATA SHEET 32-bit RISC Microcontroller CMOS FR50 MB91360G Series MB91FV360GA/F362GB/F369GA/F364G/F365GB/ F367GB/F366GB/F368GB/366GA/F376G DESCRIPTION The MB91360G series is a standard microcontroller containing a wide range of I/O peripherals and bus control functions. The MB91360G series features a 32-bit RISC CPU (FR50) core and is suitable for embedded control applications requiring high-performance and high-speed CPU processing ...

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MB91360G Series • FR50 CPU : RISC architecture The CPU has a general-purpose register architecture with improved numeric implementation whereby a wide range of delayed branch instructions reduces losses in execution time due to pipeline breaks. Bit manipulation instructions and ...

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... Other • Power supply voltage • power supply used, the internal regulator creates internal supply of 3.3 V • Package : MB91FV360GA uses a PGA401 package, MB91F362GB is delivered in a QFP208 package, and MB91F369GA in QFP160 package. MB91F364G, MB91F365GB, MB91F366GB, MB91F367GB, MB91F368GB, MB91366GA and MB91F376G will be delivered in an LQFP120 package. ...

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... MB91360G Series PRODUCT LINEUP MB91FV360GA, MB91F362GB, MB91F364G, MB91F369GA Resource Channels Memory Size Cache/Instruction RAM D-bus RAM F-bus RAM Flash/ROM (F-bus) Boot ROM EDSU CAN Stepper Motor Control Sound Generator PPG Input Capture Output Compare Free Running Timer D/A Converter A/D Converter ...

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MB91F365GB, MB91F366GB, MB91366GA, MB91F367GB, MB91F368GB Resource Channels MB91F365GB Memory Size Cache/Instruction RAM - / 4 KB D-bus RAM 16 KB F-bus RAM 16 KB Flash/ROM 512 KB (F-bus) Fast Flash Boot ROM 2 KB ⎯ EDSU CAN 2 ch Stepper ...

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MB91360G Series PIN ASSIGNMENTS • MB91FV360GA 119 120 174 175 176 230 231 232 173 284 285 286 118 229 334 335 68 172 283 380 381 22 117 228 333 67 171 282 379 21 116 ...

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... MB91F362GB UART CAN 156 157 SOT2 PQ [5:0] PP [5: PWM1P0 PWM1M0 PWM2P0 PWM2M0 HV DD PWM1P1 PWM1M1 PWM2P1 PWM2M1 HV SS PWM1P2 PWM1M2 PWM2P2 PWM2M2 HV DD PWM1P3 PWM1M3 PWM2P3 PWM2M3 D10 D11 D12 D13 D14 D15 INDEX D16 D17 D18 D19 D20 D21 ...

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MB91360G Series • MB91F364G SIO 91 Port PR0 93 PR1 94 PR2 95 PR3 96 PR4 97 PR5 98 PR6 99 PR7 100 V SS 101 V DD 102 LED0 103 LED1 104 LED2 105 LED3 ...

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MB91F369GA Ext. Bus Control D0 121 D1 122 D2 123 D3 124 D4 125 D5 126 D6 127 D7 128 D8 129 D9 130 D10 131 D11 132 D12 133 D13 134 D14 135 D15 136 ...

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MB91360G Series • MB91F365GB Digital I/O-Ports 91 PG3 92 PG4 PG5 PWM1P0 96 PWM1M0 97 PWM2P0 98 PWM2M0 99 HV 100 DD PWM1P1 101 PWM1M1 102 103 PWM2P1 PWM2M1 104 HV 105 SS ...

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MB91F366GB/MB91F376G Digital I/O-Ports UART 91 PG3 PG4 92 PG5 PWM1P0 96 PWM1M0 97 PWM2P0 98 PWM2M0 99 HV 100 DD 101 PWM1P1 PWM1M1 102 PWM2P1 103 PWM2M1 104 SMC HV 105 SS ...

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MB91360G Series • MB91F367GB Digital I/O-Ports 91 PG3 92 PG4 PG5 PR0 96 PR1 97 PR2 98 PR3 99 HV 100 DD 101 PR4 PR5 102 103 PR6 PR7 104 V 105 SS ...

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MB91F368GB Digital I/O-Ports UART 91 PG3 PG4 92 PG5 PR0 96 PR1 97 PR2 98 PR3 99 HV 100 DD PR4 101 PR5 102 103 PR6 PR7 104 V 105 SS PS0 ...

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MB91360G Series • MB91366GA Digital I/O-Ports 91 PG3 PG4 92 PG5 PWM1P0 96 PWM1M0 97 PWM2P0 98 PWM2M0 99 HV 100 DD 101 PWM1P1 PWM1M1 102 PWM2P1 103 PWM2M1 104 SMC HV 105 ...

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PIN DESCRIPTIONS •MB91FV360GA I/O Pins and Their Functions Pin No. Pin Name I/O 1 D18 I/O 2 D11 I I/O 4 ⎯ ⎯ PWM2M1 I/O 8 PWM1M1 I/O 9 PWM1P0 ...

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MB91360G Series Pin No. Pin Name 34 AN3 35 DACK2 36 AN13 37 AN8 38 ALE 39 WR1X 40 RDX 41 CS7X 42 A26 43 A20 44 A12 45 D21 46 D16 47 D13 ...

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Pin No. Pin Name I/O 67 TDT54 I/O 68 TDT48 I/O 69 TDT26 I/O 70 TDT21 I/O 71 TDT18 I/O 72 TDT12 I/O 73 TDT8 I/O 74 TDT3 I/O 75 ICS2 O ⎯ RSTX I ...

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MB91360G Series Pin No. Pin Name 101 PWM2P0 102 103 SOT1 104 SIN0 105 TX1 106 OCPA2 107 SCK3 108 SIN4 109 SCL 110 TCLK 111 TAD12 112 TAD15 113 TAD1 114 TDT65 115 TDT59 116 TDT55 ...

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Pin No. Pin Name I/O 135 DACK0 I/O 136 AN10 I/O 137 CS0X I/O 138 CS3X I/O 139 BGRNTX I/O 140 CS4X I/O 141 A22 I/O 142 A18 I/O 143 A14 I/O 144 A5 I/O ⎯ 145 INDEX 146 D30 ...

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MB91360G Series Pin No. Pin Name 169 TDT61 170 TDT58 171 TDT52 172 TDT45 173 TDT39 174 TDT35 175 TDT31 176 TDT24 177 TDT15 178 TDT14 179 TDT10 180 ICD1 181 ICD2 182 HSTX 183 OUT3 184 OUT0 185 INT6 ...

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Pin No. Pin Name I/O 203 D29 I/O 204 D25 I/O 205 D20 I/O 206 D15 I/O 207 D4 I/O ⎯ 208 209 PWM1M2 I/O 210 PWM1P2 I/O 211 PWM1M0 I/O 212 SIN2 I/O 213 RX3 I/O ...

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MB91360G Series Pin No. Pin Name 237 ICS1 238 ICS0 239 MD2 240 IN2 241 INT4 242 LED6 243 LED3 244 245 TESTX 246 DA0 247 AN5 248 AN0 249 AN15 250 CS1X 251 WR3X 252 WR2X 253 DREQ2 254 ...

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Pin No. Pin Name I/O ⎯ 271 V SS 272 OCPA3 I/O ⎯ 273 V SS 274 ⎯ 275 276 TADSCX O 277 TCE1X O 278 TAD4 O 279 TAD0 O 280 TDT62 I/O 281 TDT53 I/O ...

Page 24

MB91360G Series Pin No. Pin Name 305 RDY 306 A25 307 A16 308 A10 309 A6 310 A1 311 312 D24 313 D12 314 315 PWM2P3 316 HV SS 317 HV SS 318 319 320 TX2 321 ...

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Pin No. Pin Name I/O 339 TDT0 I/O ⎯ 340 V SS ⎯ 341 V SS 342 ⎯ 343 344 INT0 I/O 345 LED2 I/O 346 LED0 I/O ⎯ 347 ⎯ 348 AV SS ...

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MB91360G Series (Continued) Pin No. Pin Name 373 V SS 374 V SS 375 376 377 378 379 380 381 382 383 ...

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I/O Pins and Their Functions Pin No. Pin Name I/O 1 D24 I/O 2 D25 I/O 3 D26 I/O 4 D27 I/O 5 D28 I/O 6 D29 I/O 7 D30 I/O 8 D31 I I ...

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MB91360G Series Pin No. Pin Name 34 CS6X 35 RDY 36 BGRNT 37 BRQ 38 RDX 39 WR0X 40 WR1X 41 WR2X 42 WR3X ALE 45 CLK CS0X 48 CS1X 49 CS2X 50 CS3X ...

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Pin No. Pin Name I/O 67 AN1 I/O 68 AN2 I/O 69 AN3 I/O 70 AN4 I/O 71 AN5 I/O 72 AN6 I/O 73 AN7 I/O ⎯ DA0 O 76 DA1 O 77 ALARM I ⎯ ...

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MB91360G Series Pin No. Pin Name 101 INT7 102 IN0 103 IN1 104 IN2 105 IN3 106 OUT0 107 OUT1 108 OUT2 109 OUT3 110 V SS 111 MD0 112 MD1 113 MD2 114 HSTX 115 INITX 116 MONCLK 117 ...

Page 31

Pin No. Pin Name I/O 135 SCK3 I/O 136 OCPA 0 I/O 137 OCPA 1 I/O 138 OCPA 2 I/O 139 OCPA 3 I/O 140 OCPA 4 I/O 141 OCPA 5 I/O 142 OCPA 6 I/O 143 OCPA 7 I/O ...

Page 32

MB91360G Series Pin No. Pin Name 169 PWM2P1 170 PWM2M1 171 HV SS 172 PWM1P2 173 PWM1M2 174 PWM2P2 175 PWM2M2 176 HV DD 177 PWM1P3 178 PWM1M3 179 PWM2P3 180 PWM2M3 181 HV SS 182 183 ...

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Pin No. Pin Name I/O 203 D18 I/O 204 D19 I/O 205 D20 I/O 206 D21 I/O 207 D22 I/O 208 D23 I/O Note : If pins V 35 (25, 51, 182, 198) are connected to 3.3 V then ...

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MB91360G Series • MB91F364G I/O pins and functions Pin No Pin Name 1 AN0 2 AN1 3 AN2 4 AN3 5 AN4 6 AN5 AVRL SS 8 AVRH AN6 11 AN7 12 AN8 ...

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Pin No Pin Name I/O 34 INT0 I/O 35 INT1 I/O 36 INT2 I/O 37 INT3 I/O 38 INT4 I/O 39 INT5 I/O 40 INT6 I/O 41 INT7 I/O ⎯ ⎯ IN0 I/O ...

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MB91360G Series Pin No Pin Name BREAKX RX0 72 TX0 73 OCPA0 74 OCPA1 75 OCPA2 76 OCPA3 77 V ...

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Pin No Pin Name I/O 99 PR7 I/O ⎯ 100 V SS ⎯ 101 V DD 102 LED0 I/O 103 LED1 I/O 104 LED2 I/O 105 LED3 I/O ⎯ 106 V SS 107 LED4 I/O 108 LED5 I/O 109 ...

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MB91360G Series •MB91F369GA I/O Pins and Their Functions Pin No. Pin Name A10 8 A11 CLK A12 13 ...

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Pin No. Pin Name I/O 34 CS2X I/O 35 CS3X I/O 36 DREQ0 I/O 37 DACK0 I/O 38 DEOP0 I/O ⎯ ⎯ ⎯ 41 AVRH ⎯ ⎯ ...

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MB91360G Series Pin No. Pin Name INT0 69 INT1 70 INT2 71 INT3 72 INT4 73 INT5 74 INT6 75 INT7 76 SGO 77 SGA 78 SDA 79 SCL 80 SOT4 81 SIN4 82 SCK4 83 ...

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Pin No. Pin Name I/O 101 OCPA0 I/O 102 OCPA1 I/O 103 OCPA2 I/O 104 OCPA3 I/O ⎯ 105 V DD 106 X0 I 107 X1 O ⎯ 108 V SS ⎯ 109 V DD 110 MONCLK O ⎯ 111 ...

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MB91360G Series (Continued) Pin No. Pin Name 135 D14 136 D15 137 138 V SS 139 D16 140 D17 141 D18 142 D19 143 D20 144 D21 145 D22 146 D23 147 D24 148 D25 149 D26 ...

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MB91F365GB/F366GB/F376G, MB91366GA I/O Pins and functions General Pin No. Pin Name I/O Purpose I/O Port ⎯ ⎯ PJ4 I/O 4 PJ5 I/O 5 PJ6 I/O 6 PJ7 I/O 7 PI3 I/O ⎯ ...

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MB91360G Series Pin No. Pin Name I/O ⎯ BOOT I/O 32 TESTX I 33 CPUTESTX I ⎯ ⎯ MONCLK O 39 INT0 I/O ...

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General Pin No. Pin Name I/O Purpose I/O Port 64 SIN4 I/O PN1 65 SCK4 I/O PN2 66 SIN3 I/O PN3 67 SOT3 I/O PN4 68 SCK3 I/O PN5 ⎯ ⎯ OCPA0 I/O PO0 71 OCPA1 ...

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MB91360G Series (Continued) Pin No. Pin Name I/O 98 PWM2P0 I/O 99 PWM2M0 I/O ⎯ 100 HVDD 101 PWM1P1 I/O 102 PWM1M1 I/O 103 PWM2P1 I/O 104 PWM2M1 I/O ⎯ 105 HV SS 106 PWM1P2 I/O 107 PWM1M2 I/O 108 ...

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MB91F367GB/F368GB I/O Pins and functions Pin No. Pin Name I/O ⎯ ⎯ PJ4 I/O 4 PJ5 I/O 5 PJ6 I/O 6 PJ7 I/O 7 PI3 I/O ⎯ ⎯ 9 ...

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MB91360G Series Pin No. Pin Name I/O 32 TESTX I 33 CPUTESTX I ⎯ ⎯ MONCLK O 39 INT0 I/O 40 INT1 I/O 41 INT2 I/O 42 ...

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General Pin No. Pin Name I/O Purpose I/O Port 66 SIN3 I/O 67 SOT3 I/O 68 SCK3 I/O ⎯ OCPA0 I/O 71 OCPA1 I/O 72 OCPA2 I/O 73 OCPA3 I/O 74 PO4 I/O 75 PO5 I/O ...

Page 50

MB91360G Series (Continued) Pin No. Pin Name I/O ⎯ 100 HV DD 101 PR4 I/O 102 PR5 I/O 103 PR6 I/O 104 PR7 I/O ⎯ 105 V SS 106 PS0 I/O 107 PS1 I/O 108 PS2 I/O 109 PS3 I/O ...

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I/O CIRCUIT TYPE Type Circuit type Stop control Stop control MB91360G Series • CMOS Automotive level Schmitt-Trigger Input Digital output ...

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MB91360G Series Type Circuit type Stop control 52 • CMOS Schmitt-Trigger Input V • Pullup Resistor: 50 kΩ ...

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Type Circuit type X1A I X0A Stop control Stop control Stop control MB91360G Series • 32 kHz Oscillator Pin Clock ...

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MB91360G Series Type Circuit type Stop control • CMOS Automotive level Schmitt-Trigger Analog input • ...

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Type Circuit type Q/ Stop control Stop control MB91360G Series • CMOS Input, ...

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MB91360G Series Type Circuit type Stop control Stop control 56 • CMOS Schmitt-Trigger Input • STOP control • ...

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Type Circuit type Stop control Note : Symbols used in circuit types (Common to all circuit diagrams channel transistor channel transistor R : Diffusion resistor MB91360G Series ...

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MB91360G Series Circuit Type = I/ I/ Analog Output D Analog Input E CMOS Schmitt-Trigger Input, Pull-up Resistor : 50 kΩ, F ...

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HANDLING DEVICES 1. Preventing Latch-up Latch-up may occur in a CMOS voltage greater than V pin or if the voltage applied between V increases rapidly resulting in thermal damage to circuit elements. Therefore, ensure that maximum ratings ...

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MB91360G Series 5. Crystal Oscillator Circuit Noise in the vicinity of the X0 and X1 pins can be a cause of device malfunction. Design the circuit board so that X0, X1, the crystal oscillator (or ceramic oscillator) , and the ...

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Therefore, once the function of the watchdog timer is enabled, the watchdog timer keeps on operating until the reset operation exceptional processing, the watchdog timer performs the delay of reset automatically under the condition in which the CPU ...

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MB91360G Series BLOCK DIAGRAM Clock Generation User RAM D-bus Bit Search Module 32 DMA Controller R-bus Adapter 16 SIO Prescaler/ SIO U-Timer/ UART Power Down Reset LED 62 FR50 Watchdog Core Timer 32 Instruction 32 Cache/RAM F-bus ...

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CPU CORE 1. Memory Space 0000 0000 H Byte data I/O 0000 0100 H Halfword data I/O 0000 0200 H Word data I/O 0000 0400 H 0000 0800 H 000F FC00 H Initial vector table area 000F FFFF H FFFF ...

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MB91360G Series 2. Dedicated Registers Each of the dedicated registers is used for a particular purpose. The dedicated registers consist of the program counter (PC) , program status (PS) , table base register (TBR) , return pointer (RP) , system ...

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Condition code register (CCR) (Bit) (3) System condition code register (SCR) (4) Interrupt level mask register (ILM) MB91360G Series ⎯ ⎯ (Bit) Initial value 10 ...

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MB91360G Series 3. General-Purpose Registers The general-purpose registers are CPU registers R0 to R15. The register are used as the accumulator for operations and as pointers (a field indicating an address) for memory access. The user can specify the purpose ...

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MODE SETTING The FR50 of devices uses mode pins (MD2 to MD0) and a mode register (MODR) to set the operation mode. (1) Mode Pins Three mode pins (MD2 to MD0) are used to specify the reset mode vector access ...

Page 68

MB91360G Series [Bits 1 and 0] : WTH1 and WTH0 (bus width/single chip mode specifying bits) The WTH1 and WTH0 bits are used to set the bus width (valid when operation mode is external bus mode) and the single chip ...

Page 69

I/O MAP • How to Read the I/O Map Address +0 PDRG [R/W] 000014 H XXXXXX - - “-” indicates non-existent bits Register name (The register in column address 4n, the register in column ...

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MB91360G Series Address +0 000000 Reserved H 000004 Reserved H PDR8 [R/W] 000008 H XXXXXXXX 00000C H PDRG [R/W] 000010 H XXXXXXXX PDRK [R/W] 000014 H XXXXXXXX PDRO [R/W] 000018 H XXXXXXXX PDRS [R/W] 00001C H XXXXXXXX 000020 H to ...

Page 71

Address +0 UTIM0/UTIMR0 [R/W] 000068 H 00000000 00000000 SSR1 [R/W, R] SIDR1 [R/W] 00006C H 00001 - 00 XXXXXXXX ULS1 [R/W] 000070 0000 UTIM1/UTIMR1 [R/W] 000074 H 00000000 00000000 SSR2 [R/W, R] SIDR2 [R/W] 000078 ...

Page 72

MB91360G Series Address +0 OCS01 [R/W] 0000B8 0000 - - 00 OCCP0 [R/W] 0000BC H XXXXXXXX XXXXXXXX OCCP2 [R/W] 0000C0 H XXXXXXXX XXXXXXXX 0000C4 H TCDT0 [R/W] 0000C8 H XXXXXXXX XXXXXXXX TCDT1 ...

Page 73

Address +0 TMRLR4 [W] 000108 H XXXXXXXX XXXXXXXX ⎯ 00010C H TMRLR5 [W] 000110 H XXXXXXXX XXXXXXXX ⎯ 000114 H GCN10 [R/W] 000118 H 00110010 00010000 GCN11 [R/W] 00011C H 00110010 00010000 PTMR0 [R] 000120 H 11111111 11111111 PDUT0 [W] ...

Page 74

MB91360G Series Address +0 PTMR7 [R] 000158 H 11111111 11111111 PDUT7 [W] 00015C H XXXXXXXX XXXXXXXX 000160 H CMCR [R/W] 000164 H 11111111 0000000 CMLS0 [R/W] 000168 H 01110111 1111111 CMLS2 [R/W] 00016C H 01110111 1111111 CMLT0 [R/W, R] 000170 ...

Page 75

Address +0 000208 H 00000000 0000XXXX XXXXXXXX XXXXXXXX 00020C H 00000000 00000000 XXXXXXXX XXXXXXXX 000210 H 00000000 0000XXXX XXXXXXXX XXXXXXXX 000214 H 00000000 00000000 XXXXXXXX XXXXXXXX 000218 H 00000000 0000XXXX XXXXXXXX XXXXXXXX 00021C H 00000000 00000000 XXXXXXXX XXXXXXXX 000220 H ...

Page 76

MB91360G Series Address +0 0003F0 H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0003F4 H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0003F8 H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0003FC H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDRG [R/W] 000400 H 00000000 DDRK [R/W] 000404 H 00000000 DDRO [R/W] ...

Page 77

Address +0 ICR28 [R/W, R] ICR29 [R/W, R] 00045C -11111 ICR32 [R/W, R] ICR33 [R/W, R] 000460 -11111 ICR36 [R/W, R] ICR37 [R/W, R] 000464 -11111 ICR40 [R/W, R] ICR41 [R/W, ...

Page 78

MB91360G Series Address +0 ASR0 [W] 000640 H 00000000 00000000 ASR1 [W] 000644 H 00000000 00000000 ASR2 [W] 000648 H 00000000 00000000 ASR3 [W] 00064C H 00000000 00000000 ASR4 [W] 000650 H 00000000 00000000 ASR5 [W] 000654 H 00000000 00000000 ...

Page 79

Address +0 ESTS0 000B00 H X0000000 XXXXXXXX ECTL0 000B04 H 0X000000 ECNT0 000B08 H XXXXXXXX XXXXXXXX EWPT 000B0C H XXXXXXXX XXXXXXXX EDTR0 000B10 H XXXXXXXX XXXXXXXX 000B14 H to 000B1C H 000B20 H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B24 H XXXXXXXX ...

Page 80

MB91360G Series Address +0 000B58 H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B5C H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B60 H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B64 H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B68 H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B6C H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ...

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... On MB91FV360GA, the cache memory can be used in I-RAM mode. 011FFC H 012000 H to 01FFFC H 020000 H to 03BFFC H 03C000 H to MB91F362GB, MB91F364G : Only 12 KB (03D000 03FFFC H 040000 H to MB91F362GB, MB91F364G : Only 4 KB (040000 043FFC H 044000 H to 0FEFFC H 050000 H to 0507FC H 050800 H to 07FFF4 H MB91360G Series Register +1 +2 ⎯ ...

Page 82

MB91360G Series Address +0 080000 H Sector 09FFFC H 0A0000 H Sector 0BFFFC H 0C0000 H Sector 0DFFFC H 0E0000 H Sector 0EFFFC H ...

Page 83

Address +0 BVALR0 [R/W] 100000 H 00000000 00000000 TCANR0 [W] 100004 H 00000000 00000000 RCR0 [R/W] 100008 H 00000000 00000000 ROVRR0 [R/W] 10000C H 00000000 00000000 CSR0 [R/W, R] 100010 H 00000000 00000001 RTEC0 [R] 100014 H 00000000 00000000 IDER0 ...

Page 84

MB91360G Series Address +0 10006C H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100070 H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100074 H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100078 H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX ...

Page 85

Address +0 1000C4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1000CC XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1000D4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1000DC XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX ...

Page 86

MB91360G Series Address +0 BVALR1 [R/W] 100200 H 00000000 00000000 TCANR1 [W] 100204 H 00000000 00000000 RCR1 [R/W] 100208 H 00000000 00000000 ROVRR1 [R/W] 10020C H 00000000 00000000 CSR1 [R/W, R] 100210 H 00000000 00000001 RTEC1 [R] 100214 H 00000000 ...

Page 87

Address +0 100268 H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10026C H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100270 H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100274 H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100278 H ...

Page 88

MB91360G Series Address +0 1002B4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1002BC XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1002C4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1002CC XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H ...

Page 89

Address +0 100324 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX CREG1 [R/W] 10032C H 00000000 00000110 BVALR2 [R/W] 100400 H 00000000 00000000 TCANR2 [W] 100404 H 00000000 00000000 RCR2 [R/W] 100408 H 00000000 00000000 ROVRR2 [R/W] 10040C H ...

Page 90

MB91360G Series Address +0 100460 H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100464 H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100468 H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10046C H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX ...

Page 91

Address +0 1004AC XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004B4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004BC XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004C4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX ...

Page 92

MB91360G Series Address +0 10051C XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100524 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX CREG2 [R/W] 10052C H 00000000 00000110 BVALR3 [R/W] 100600 H 00000000 00000000 TCANR3 [W] 100604 H ...

Page 93

Address +0 10065C H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100660 H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100664 H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100668 H XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10066C H ...

Page 94

MB91360G Series Address +0 1006AC XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006B4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006BC XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006C4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H ...

Page 95

Address +0 10071C XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100724 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX CREG3 [R/W] 10072C H 00000000 00000110 Note : Data in reserved areas and in the areas marked ...

Page 96

MB91360G Series MB91F376G SPECIAL I/O MAP Address +0 044000 H to 0447FC H 044800 H Sector 0 (parity 05FFFC H 060000 H Sector 07FFFC H 080000 H Sector 09FFFC ...

Page 97

Address +0 BVALR0 [R/W] 200000 H 00000000 00000000 TCANR0 [W] 200004 H 00000000 00000000 RCR0 [R/W] 200008 H 00000000 00000000 ROVRR0 [R/W] 20000C H 00000000 00000000 CSR0 [R/W, R] 200010 H 00000000 00000001 RTEC0 [R] 200014 H 00000000 00000000 IDER0 ...

Page 98

MB91360G Series Address +0 20006C H XXXXXXXX XXXXXXXX XXXXX--- XXXXXXXX 200070 H XXXXXXXX XXXXXXXX XXXXX--- XXXXXXXX 200074 H XXXXXXXX XXXXXXXX XXXXX--- XXXXXXXX 200078 H XXXXXXXX XXXXXXXX XXXXX--- XXXXXXXX 20007C H XXXXXXXX XXXXXXXX XXXXX--- XXXXXXXX 200080 H XXXXXXXX XXXXXXXX XXXXX--- XXXXXXXX ...

Page 99

Address +0 2000C4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 2000CC XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 2000D4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 2000DC XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX ...

Page 100

MB91360G Series Address +0 BVALR1 [R/W] 200200 H 00000000 00000000 TCANR1 [W] 200204 H 00000000 00000000 RCR1 [R/W] 200208 H 00000000 00000000 ROVRR1 [R/W] 20020C H 00000000 00000000 CSR1 [R/W] 200210 H 00000000 00000001 RTEC1 [R] 200214 H 00000000 00000000 ...

Page 101

Address +0 20026C H XXXXXXXX XXXXXXXX XXXXX--- XXXXXXXX 200270 H XXXXXXXX XXXXXXXX XXXXX--- XXXXXXXX 200274 H XXXXXXXX XXXXXXXX XXXXX--- XXXXXXXX 200278 H XXXXXXXX XXXXXXXX XXXXX--- XXXXXXXX 20027C H XXXXXXXX XXXXXXXX XXXXXXXX XXXXX--- 200280 H XXXXXXXX XXXXXXXX XXXXX--- XXXXXXXX 200284 H ...

Page 102

MB91360G Series (Continued) Address +0 2002C4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 2002CC XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 2002D4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX H XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 2002DC XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ...

Page 103

INTERRUPT CAUSES, INTERRUPT VECTORS, AND INTERRUPT CONTROL REGISTER Interrupt number Interrupt Decimal Reset 0 Mode vector 1 System reserved 2 System reserved 3 System reserved 4 System reserved 5 System reserved 6 Co-processor default trap * 4 7 Co-processor error ...

Page 104

MB91360G Series Interrupt number Interrupt Decimal CAN 2 RX CAN 2 TX/NS CAN CAN 3 TX/ PPG 0/1 PPG 2/3 PPG 4/5 PPG 6/7 Reload Timer 3 Reload Timer 4 Reload Timer 5 ICU ...

Page 105

Interrupt number Interrupt Decimal Delayed interrupt 63 activation bit System reserved * 3 64 System reserved * 3 65 Security vector 66 System reserved 67 System reserved 68 System reserved 69 System reserved 70 System reserved 71 System reserved ...

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MB91360G Series PERIPHERAL RESOURCES 1. Instruction Cache This section describes the instruction cache memory included in FR50 Family members and it operation. This only applies to MB91FV360GA. (1) General description The instruction cache is temporary memory. When an external low-speed ...

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Way 1 31 Address tag 07 06 SBV3 SBV2 Sub-block valid LRU Entry lock Way 2 31 Address tag 07 06 SBV3 SBV2 Sub-block valid Entry lock Instruction Cache Tag MB91360G Series 09 08 Reserved ...

Page 108

MB91360G Series (3) Control register structure IRBS (32 bits) Address : 00000300 H Address : 00000302 H IRBS [bits 15 to 12] These bits are used to set the base address of cache RAM at access in the RAM mode. ...

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Boot ROM The Boot ROM is a fixed start-up routine which is located at FF000 after every RST or INIT. The purpose of this ROM is to configure the device after a reset and to provide a simple serial ...

Page 110

... The purpose of the clock modulator is to spread the energy of these signals over a wide range of frequencies and thus reducing the amplitudes of the fundamental and harmonic frequencies. With the use of an advanced frequency modulation algorithm, the Fujitsu built in clock modulator can achieve an attenuation 20-25 dB compared to non modulated clock operation. Since the modulator is highly configurable, it can be optimally adjusted to the actual application in order to achieve minimal electromagnetic interference ...

Page 111

I/O Ports The I O port registers consist of the / and the port function registers “ The bits in PDRs correspond to the bits in DDRs and PFRs. Similarly, the register bits correspond to the port pins. The ...

Page 112

MB91360G Series (1) Register configuration Port data register PDR7 7 Address : 00000007 P77 H PDR8 7 Address : 00000008 P87 H PDR9 7 Address : 00000009 P97 H PDRB 7 Address : 0000000B PB7 H PDRG 7 Address : ...

Page 113

PDRP 7 6 Address : 00000019 PP7 PP6 H PDRQ 7 6 Address : 0000001A ⎯ ⎯ H PDRR 7 6 Address : 0000001B PR7 PR6 H PDRS 7 6 Address : 0000001C PS7 PS6 H MB91360G Series 5 ...

Page 114

MB91360G Series Data directon register (DDR) DDR7 7 Address : 00000607 P77 H DDR8 7 Address : 00000608 P87 H DDR9 7 Address : 00000609 P97 H DDRB 7 Address : 0000600B PB7 H DDRG 7 Address : 00000400 PG7 ...

Page 115

DDRP 7 6 Address : 00000409 PP7 PP6 H DDRQ 7 6 Address : 0000040A ⎯ ⎯ H DDRR 7 6 Address : 0000040B PR7 PR6 H DDRS 7 6 Address : 0000040C PS7 PS6 H MB91360G Series 5 ...

Page 116

MB91360G Series Port function registers (PFR) PFR7 7 Address : 00000617 P77 H PFR8 7 Address : 00000618 P87 H PFR9 7 Address : 00000619 P97 H PFRB 7 Address : 0000061B PB7 H PFR27 7 Address : 00000627 P277 ...

Page 117

PFRO 7 Address : 00000418 PO7 PO6 H PFRP 7 Address : 00000419 PP7 PP6 H PFRQ 7 ⎯ Address : 0000041A H PFRR 7 Address : 0000041B PR7 PR6 H PFRS 7 Address : 0000041C PS7 PS6 H ...

Page 118

MB91360G Series DMA Controller DMAC 5. ( The DMAC module is used to implement direct memory access (DMA) transfer in FR50 family devices DMA transfer controlled by this module, various types of data can be transferred at high ...

Page 119

Registers configuration Channel 0 control/status register A Channel 0 control/status register B Channel 1 control/status register A Channel 1 control/status register B Channel 2 control/status register A Channel 2 control/status register B Channel 3 control/status register A Channel 3 ...

Page 120

MB91360G Series (4) Block diagram DMA trnasfer request to bus controller Read Read/Write Write control DDNO To bus controller Access Address 120 Counter DMA start cause selection Buffer circuit and request Selector acceptance control DTC 2-step register DTCR Counter Buffer ...

Page 121

UART The UART is a serial I/O port for performing asynchronous (stop-start synchronization) communications. The MB91360G series contains three UART channels. (1) Features • Full-duplex, double buffering • Supports asynchronous (stop-start synchronization) communications • Supports multi-processor mode • Fully ...

Page 122

MB91360G Series (2) Register configuration Register structure 15 Serial input register (SIDR) Serial output register (SODR) Serial status register (SSR) Serial mode register (SMR) Serial control register (SCR) UART level select register (ULS) Address Bits SMR 0000 0063 H 0000 ...

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Block diagram ( ) Control signals From U-TIMER Clock selection circuit SI (Reception data) Reception status detecton circuit Reception error occurrence signal for DMA (to DMAC) MD1 MD0 SMR register CS0 MB91360G Series Transmitting clock Receiving clock Reception control ...

Page 124

MB91360G Series 7. U-TIMER (16-bit Timer for UART Baud Rate Generation) The U-timer (U-TIMER 16-bit timer used to generate the baud rate for the UART. The operating frequency of the chip and the U-TIMER reload value can be ...

Page 125

Register configuration Register structure 15 DRCL UTIM Address Bits 15 ch0 00000068 H b15 ch1 00000074 H ch2 00000080 H UTIMR Reload Register UTIMR Address Bits 15 ch0 00000068 H b15 ch1 00000074 H ch2 00000080 H UTIMC U ...

Page 126

MB91360G Series 8. PWM Timer The PWM (Pulse Width Modulation) timer can output high-precision pulse waves at an arbitrary cycle and pulse width (duty ratio) . The MB91360G series contains eight PWM timer channels. Each of the channels consists of ...

Page 127

Register configuration for Address 15 00000118 H 0000011A H PDBL0 PWM timer ch 0 00000120 H 00000122 H 00000124 H 00000126 PCNH0 H PWM timer ch 1 00000128 H 0000012A H 0000012C H 0000012E ...

Page 128

MB91360G Series (3) PWM timer registers for Address 15 0000011C H 0000011E H PWM timer ch 4 00000140 H 00000142 H 00000144 H 00000146 H PWM timer ch 5 00000148 H 0000014A H 0000014C H ...

Page 129

Configuration diagram of the entire PWM timer 16-bit reload timer ch0 ch1 General control register 20 Disable register 0 16-bit reload timer ch2 ch3 General control register 21 Disable register 1 (5) Configuration diagram of PWM timer 1 ch ...

Page 130

MB91360G Series 16 bit Reload Timer 9. - Each 16-bit reload timer consists of a 16-bit down-counter, a 16-bit reload register, a prescaler for generating the internal count clock, and a control register. The 16-bit reload timer can also activate ...

Page 131

Block diagram 16 16-bit reload register 8 16-bit down-counter 16 Clock selector 2 φ φ φ Internal clock MB91360G Series Reload RELD UF OUT INTE GATE CTL. CSL1 CNTE CSL0 TRG PWM Clear ...

Page 132

MB91360G Series 10. Bit Search Module The bit search module searches for a “0”, “1”, or change-point in the data written to the input register and returns the position of the detected bit. This section describes the data register for ...

Page 133

Block diagram of the bit search module Address decoder MB91360G Series Input latch Detection mode One-detect data conversion Bit search circuit Search result 133 ...

Page 134

MB91360G Series 10 bit Converter Successive Approximation Conversion Type 11. - A/D ( This section provides an overview of the A/D converter, describes the register structure and functions, and describes the operation of the A/D converter. A/D Converter converts analog ...

Page 135

Channel setting register (ADCH) bit Address : 00009D ANS3 H Mode register (ADMD) bit Address : 00009C H Control status register (ADCS) bit Address : 00009F BUSY H Data register (ADCD) bit Address : 0000A1 H bit Address : ...

Page 136

MB91360G Series • Block diagram AN0 AN1 AN2 AN3 AN4 AN5 AN6 AN7 AN8 AN9 ANA ANB ANC AND ANE ANF Trigger activation ATGX Timer activation Output of 16-bit reload timer 4 (internal connection) Machine clock (φ) 136 AV MPX ...

Page 137

Interrupt Controller An interrupt controller controls interrupt acceptance and arbitration processing. Hardware configuration This module consists of the following : • ICR register • Interrupt priority evaluation circuit • Interrupt level and interrupt number (vector) generator • Hold request ...

Page 138

MB91360G Series (1) Register configuration Address : 00000440 H Address : 00000441 H Address : 00000442 H Address : 00000443 H Address : 00000444 H Address : 00000445 H Address : 00000446 H Address : 00000447 H Address : 00000448 ...

Page 139

Address : 00000460 H ⎯ Address : 00000461 H ⎯ Address : 00000462 H ⎯ Address : 00000463 H ⎯ Address : 00000464 H ⎯ Address : 00000465 H ⎯ Address : 00000466 H ⎯ Address ...

Page 140

MB91360G Series (2) Block diagram NMIRQ (NMI request) R100 R147 (DLYIRQ) 140 UNMI WAKEUP (1 if LEVEL = 11111) Priority evaluation 5 NMI processing LEVEL LEVEL evaluation and ICR00 VECTOR generation 6 VECTOR evaluation ICR47 R-bus LEVEL4 to 0 HLDREQ ...

Page 141

External Interrupt/NMI Control Block The external interrupt/NMI controller controls external interrupt requests input from the NMIX and INT0 to INT7 pins. Detection of “H” levels, “L” levels, rising edges, or falling edges can be selected (except for the NMI) ...

Page 142

MB91360G Series 14. Delayed Interrupt Delayed interrupt control register (DICR) The delayed interrupt control register (DICR delayed interrupt generator register and is used to generate the task switching interrupt. Structure of the DICR Address Bits 00000044 H 142 ...

Page 143

Clock Generation The MB91360G series generates internal operating clocks as follows : • Base clock generation : Device scales clock source input clock) or oscillates base clock with PLL to generate basic clock (PLL clock) • ...

Page 144

MB91360G Series TBCR : Time-based counter control register bit address : 00000482 H Initial Value (INIT) Initial Value (RST) CTBR : Time-based counter clear register bit address : 00000483 H Initial Value (INIT) Initial Value (RST) CLKR : Clock source ...

Page 145

CMCR : Clock control for CAN modules address bit 15 bit 14 0164 H PRE7 PRE6 R/W R/W 1 address bit 7 bit 6 0165 H PRES CDSELE R/W R/W 0 Subclock RTC32 (CLKR2) This register is used to ...

Page 146

MB91360G Series (2) Block diagram SELCLK Oscillator X0 circuit X1 4 MHz Oscillator X0A circuit X1A 32 kHz internal Interrrupt internal Reset HSTX RSTX INITX 146 [Clock generation block] DIVR0 and DIVR1 registers CPU clock division ...

Page 147

Bus Interface The external bus interface controls the interfaces with the external memory and external I/Os. • 32-bit (4 GB) address output. • eight independent banks provided by chip-select function The banks can be set ...

Page 148

MB91360G Series (Continued) Area mask register (AMR0 to AMR7 AMR0 A31 A30 00000642 AMR1 A31 A30 00000646 AMR2 A31 A30 0000064A AMR3 A31 A30 0000064E AMR4 ...

Page 149

Block diagram Address bus Data bus 32 32 Write bus Read buffer Address buffer MB91360G Series A-OUT Switch MUX Switch + ASR ASZ Comparator External pin control section All block control resisters & control External data bus ...

Page 150

MB91360G Series 17. CAN Controller This section provides an overview of the CAN Interface, describes the register structure and functions, and describes the operation of the CAN Interface. The CAN controller is a module built into a MB91360G series. The ...

Page 151

List of control registers Address Register CAN0 100000 H Message buffer valid register 100001 H 100002 H Transmit request register 100003 H 100004 H Transmit cancel register 100005 H 100006 H Transmit complete register 100007 H 100008 H Receive ...

Page 152

MB91360G Series (Continued) Address Register CAN0 10001A H Transmit RTR register 10001B H 10001C H Remote frame receive waiting register 10001D H 10001E H Transmit interrupt enable register 10001F H 100020 H 100021 H Acceptance mask select register 100022 H ...

Page 153

Message buffers List of Message Buffers (ID Registers) Address Register CAN0 10002C H to General-purpose RAM 10004B H 10004C H 10004D H ID register 0 10004E H 10004F H 100050 H 100051 H ID register 1 100052 H 100053 ...

Page 154

MB91360G Series Address Register CAN0 100068 H 100069 H ID register 7 10006A H 10006B H 10006C H 10006D H ID register 8 10006E H 10006F H 100070 H 100071 H ID register 9 100072 H 100073 H 100074 H ...

Page 155

Address Register CAN0 100088 H 100089 H ID register 15 10008A H 10008B H List of Message Buffers (DLC Registers and Data Registers) Address Register CAN0 10008C H DLC register 0 10008D H 10008E H DLC register 1 10008F ...

Page 156

MB91360G Series Address Register CAN0 1000A2 H DLC register 11 1000A3 H 1000A4 H DLC register 12 1000A5 H 1000A6 H DLC register 13 1000A7 H 1000A8 H DLC register 14 1000A9 H 1000AA H DLC register 15 1000AB H ...

Page 157

Address Register CAN0 1000FC H to Data register 10 (8 bytes) 100103 H 100104 H to Data register 11 (8 bytes) 10010B H 10010C H to Data register 12 (8 bytes) 100113 H 100114 H to Data register 13 ...

Page 158

MB91360G Series (3) Block diagram CANCLK CREG CLKT External Bus Prescaler (User Logic Bus) frequency division PSC PR BTR PH RSJ TOE TS RS CSR HALT Node status change NIE NT interrupt generation NS1,0 RTEC BVALR TBFx, ...

Page 159

D/A Converter This section provides an overview of the D/A converter, describes the register structure and functions, and describes the operarton of D/A converter.This block is an R-2R format D/A converter, having ten-bit resolution. The D/A converter has two ...

Page 160

MB91360G Series (2) Registers D/A control register (DACR) Address : 0000A5 D/A converter data register (ch 0) (DADR0) Address : 0000A6 Address : 0000A7 D/A converter data register (ch 1) (DADR1) Address : 0000A8 Address : 0000A9 D/A clock control ...

Page 161

Interface This section describes the functions and operation of the fast interface is a serial I/O port supporting the Inter IC bus, operating as a master/slave device on the I The ...

Page 162

MB91360G Series (2) Block diagram IDBL2 DBL ICCR2 CS4 CS3 5 5 CS2 CS1 CS0 IBSR2 Bus busy BB Repeat start RSC Last Bit LRB TRX ADT AL IBCR2 BER BEIE INTE INT IBCR2 Start SCC Master MSS ACK enable ...

Page 163

interface registers a : Bus control register (IBCR2) bit 15 BER Address : 000184 H Read/write (R/ Default value b : Bus status register (IBSR2) bit 7 Address : 000185 BB H Read/write ...

Page 164

MB91360G Series (Continued Seven bit slave address mask register (ISMK) bit Address : 00018A H Read/write Default value g : Data register (IDARH, IDAR2) Data register high byte bit Address : 00018C H Read/write Default value Data register ...

Page 165

I/O Timer The MB91360G Series contains two 16-bit free-running timer modules, two output compare modules, and two input capture modules and supports four input channels and four output channels. The following sections only describes the 16-bit free-running timer, ...

Page 166

MB91360G Series (2) Registers a : 16-bit free-running timer 0000C8 H 0000CC H 0000CB H 0000CF 16-bit output compare 0000BC H 0000BE H 0000C0 H 0000C2 H 0000B8 16-bit input capture 0000B0 H 0000B2 ...

Page 167

Alarm Comparator This section provides an overview of the Alarm Comparator (Also called Under/Overvoltage Detection) , de- scribes the register structure and functions, and describes the operation of the Alarm Comparator. (1) Block diagram Alarm comparator - analog part ...

Page 168

MB91360G Series 22. Power Down Reset This section provides an overview of the Power Down Reset, and describes the register structure. The power down reset module performs a system reset when V signal is be disabled and enabled by setting ...

Page 169

Serial I/O Interface (SIO) This section provides an overview of the Serial I/O Interface (SIO) , and describes the register structure. (1) Block diagram This block is a serial I/O interface that allows data transfer using clock synchronization. The ...

Page 170

MB91360G Series 2 Registers ( ) Serial mode control status register (SMCS) Address : 000084 Address : 000085 SIO edge selection/clock disable register (SES) Address : 000086 Serial data register (SDR) Address : 000087 170 ...

Page 171

Sound Generator This section provides an overview of the Sound Generator, and describes the register structure. The Sound Generator consists of the Sound Control register, Frequency Data register, Amplitude Data register, Decrement Grade register, Tone Count register, Sound Disable ...

Page 172

MB91360G Series (2) Block diagram Clock input Prescaler 8-bit PWM pulse generator S1 S0 Amplitude data Decrement grade 172 Frequency counter PWM Reload Decrement Grade register register DEC Decrement CI counter CO EN register Tone pulse counter ...

Page 173

Stepper Motor Controller This section provides an overview of the Stepper Motor Control Module, and describe the register structure. The Stepping Motor Controller consists of two PWM Pulse Generators, four motor drivers, Selector Logic and the Zero Rotor Position ...

Page 174

MB91360G Series (2) Registers PWM control 0 register (PWC0) bit Address : 0000D1 H Read/write Default value Zero detect 0 register (ZPD0) bit Address : 0000D0 H Read/write Default value PWM1 compare 0 register (PWC10) bit Address : 0000D9 H ...

Page 175

Real Time Clock This section provides an overview of the Real Time Clock (also called WatchTimer) , describes the register structure and functions.The Real Time Clock (Watch Timer) consists of the Timer Control register, Sub-second register, Second/Minute/Hour registers, 1/2 ...

Page 176

MB91360G Series (2) Registers Timer disable register (WTDBL) bit Address : 0000F5 H Read/write Default value Timer control register (WTCR) bit Address : 0000F7 H Read/write Default value bit Address : 0000F6 H Read/write Default value Sub-second register (WTBR) bit ...

Page 177

Minute register (WTMR) bit Address : 0000FD H Read/write ( ⎯ ⎯ ) Default value Hour register (WTHR) bit Address : 0000FC H ( ⎯ ) Read/write ( ⎯ ) Default value ...

Page 178

... This behavior can be altered by the configuration input, SELCLK pin to switch the RTC module to operate with the 4 MHz clock. The following sections describe the operation with SELCLK connected to “0” and SELCLK connected to “1” respectively. Note : On MB91F362GB SELCLK should always be connected to “1”, subclock operation is not implemented on those devices. (1) Operation of subclock (SELCLK = 0) The next table summarizes the operation states of the components related to the Subclock System ...

Page 179

MHz real time clock configuration (SELCLK = 1) When the SELCLK pad is connected logic level 1, the 32 kHz oscillation is disabled regardless of the software setting. In this configuration, the Real Time Clock Module is supplied ...

Page 180

MB91360G Series 28. 32 kHz Clock Calibration Unit The 32 kHz Clock Calibration Module provides possibilities to calibrate the 32 kHz oscillation clock with respect to the 4 MHz oscillation clock. (1) Description This hardware allows the software to measure ...

Page 181

Timing 32 kHz STRT (CLKP) STRTS (32 kHz) RUN (32 kHz) RUNS (4 MHz) 32 kHz counter (16 bit) 4 MHz counter (24 bit) old CUTR READY (32 kHz) READYPULSE (CLKP) INT (CLKP) MB91360G Series CUTD CUTD ...

Page 182

MB91360G Series (4) Clocks The module operates with 3 different clocks : The 4 MHz clock OSC4, the 32 kHz clock OSC32 and the R-bus clock CLKP . Synchronization circuits adapt the different domains. All 3 clocks are gated. The ...

Page 183

Register description a : Calibration unit control register (CUCR) Control register low byte (CUCRL) bit 7 ⎯ Address : 000191 H Read/write ( Default value kHz timer data register (CUTD) 32 ...

Page 184

MB91360G Series 29. Flash Memory MB91360G series devices feature 512 Kbyte of embedded flash memory unit derived from the MB29LV400C and the FLASH Memory interface circuit. (1) Out line of flash memory The Flash Memory consists of a flash memory ...

Page 185

Block diagrams of flash memory a : Block diagram of flash memory Figure shows the block diagram of the flash memory unit, which has almost the same configuration as the MBM29LV400C. RY/BY buffer WE BYTE Control circuit RESET CE ...

Page 186

MB91360G Series c : Sector configuration 8 bit × 2 Sector 13 Sector 12 Sector 11 Sector 10 Sector 9 Sector 8 Sector 7 Sector 6 Sector 5 Sector4 Sector 3 Sector 2 Sector 1 Sector 0 MSB 8 bit ...

Page 187

Write/Erase modes The flash memory can be accessed in two different ways; the flash memory mode allowing write/erase directly from the external pins, and the other modes allowing write/erase from the CPU via the internal bus. These modes are ...

Page 188

... A18 ⎯ ⎯ [A20] WE 140 CS4X BYTE 196 CS5X OE 305 RDY CE 139 BGRNTX RY/BY 88 BRQ 293 MD0 ID RESET 31 MD1 ( 239 MD2 ID RESET 30 INITX 188 MB91F362GB MB91F364G Pin Pin Pin Name Pin Name No. No PR0 PR1 PR2 PR3 PR4 PR5 PR6 PR7 ...

Page 189

... A26 Notes : • MB91F362GB : A19 (pin 30) and A20 (pin 32) must be pulled “L” level in Flash Memory Mode. At reading from Flash memory D15 (p183 to pin 197, pin 200) are switched to the output mode. See “Pins not used in flash memory mode (MB91F362GB) ”. ...

Page 190

... MB91360G Series Pins not used in flash memory mode (MB91F362GB) MB91F362GB Pin No. Normal function 75, 76 DA0, DA1 77 ALARM TESTX, CPUTESTX LTESTX 114 HSTX 116 MONCLK 117 SELCLK 119, 121 X0, X0A 120, 122 X1, X1A 124 CPO 125 Other signal 190 Flash memory mode ...

Page 191

MB91F365GB/F366GB/F367GB/F368GB/F376G Pins used in flash memory mode MB91F365GB/ MBM29LV MB91F366GB 400C Pin No. Pin Name A-1 96 PWM1P0 A0 97 PWM1M0 A1 98 PWM2P0 A2 99 PWM2M0 A3 101 PWM1P1 A4 102 PWM1M1 A5 103 PWM2P1 A6 104 PWM2M1 ...

Page 192

MB91360G Series (Continued) MB91F365GB/ MBM29LV MB91F366GB 400C Pin No. Pin Name DQ0 117 DQ1 118 DQ2 119 DQ3 120 DQ4 52 DQ5 53 DQ6 54 DQ7 55 DQ8 39 DQ9 40 DQ10 41 DQ11 42 DQ12 43 DQ13 44 DQ14 ...

Page 193

Pins not used in flash memory mode (MB91F365GB/F366GB/F367GB/F368GB/F376G) MB91F365GB/F366GB/F367GB/F368GB/F376G Pin No. Normal function SIN3 67 SOT3 68 SCK3 27 DA0/X0A 28 DA1/X1A 29 ALARM Other signal Pin state X0 Input X1 Output Output Output Output Output/Input Output ...

Page 194

... MB91360G Series (4) Flash control status register (FMCS) Flash Memory Macros used in devices : Normal Flash Macro used in : MB91F362GB Address FV360GA, F362GB : 00007000 Access Initial value value after Boot ROM *: It is not allowed to use RDYEG. 194 Fast Flash Macro used in : MB91FV360GA bit 7 bit 6 ...

Page 195

Read/Write access In the flash memory mode, read/write access to the flash memory must be under control of the external pins. However, with the CPU access, there are no special timing constraints on read/write access because the flash memory ...

Page 196

MB91360G Series Normal flash macro : Recommended settings CLKB Unmodulated Core Clock Frequency FAC1 [MHz CLKB Core Clock Peak Max Frequency Frequency [MHz ...

Page 197

Fast flash macro : Recommended settings CLKB Unmodulated Core Clock Frequency FAC1 [MHz CLKB Core Clock Peak Max Frequency FAC1 Frequency [MHz ...

Page 198

MB91360G Series c : Write access with CPU Recommended settings for WTC2 to WTC0 for write access to the flash memory, FACCEN of FMCS should be set to 1 for writing, so FAC1, FAC0, EQINH bit settings then have no ...

Page 199

Automatic write/erase Irrespective of the Flash Memory mode or other modes, writing to/erasing the flash memory unit is performed by starting the flash memory automatic algorithm. To start the automatic algorithm, various sequences of write accesses are executed in ...

Page 200

MB91360G Series Command Sequence List (Flash Memory Mode) Write Write Cycle Command Cycle of First Bus Sequence of Bus Address Data Read/ 1 nxxxx F0 Reset* Read/ 4 naaaa AA Reset* Write 4 naaaa AA Chip Erase 6 naaaa AA ...

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