MC54HC367J Motorola, MC54HC367J Datasheet
MC54HC367J
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MC54HC367J Summary of contents
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... High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 92 FETs or 23 Equivalent Gates LOGIC DIAGRAM OUTPUT ENABLE 1 15 OUTPUT ENABLE 2 10/95 Motorola, Inc. 1995 PIN PIN 8 = GND 1 REV 6 MC54/74HC367 J SUFFIX CERAMIC PACKAGE 16 CASE 620–10 ...
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... Current (per Package) Î Î Î Î Î Î Î Î Î Î Î Î Î NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). MOTOROLA Î Î Î Î Î Î Î Î Î ...
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... NOTES: 1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). 2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). ...
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... MC54/74HC367 A OUTPUT ENABLE MOTOROLA LOGIC DETAIL TO OTHER BUFFERS 4 ONE OF 6 BUFFERS High–Speed CMOS Logic Data DL129 — Rev 6 ...
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... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “ ...