MC54HC245AJ Motorola, MC54HC245AJ Datasheet

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MC54HC245AJ

Manufacturer Part Number
MC54HC245AJ
Description
Octal 3-state noninverting bus transceiver
Manufacturer
Motorola
Datasheet

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Noninverting
Bus Transceiver
High–Performance Silicon–Gate CMOS
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
asynchronous communication between data buses. The device has an
active–low Output Enable pin, which is used to place the I/O ports into
high–impedance states. The Direction control determines whether data
flows from A to B or from B to A.
10/95
Motorola, Inc. 1995
The MC54/74HC245A is identical in pinout to the LS245. The device
The HC245A is a 3–state noninverting transceiver that is used for 2–way
OUTPUT ENABLE
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 308 FETs or 77 Equivalent Gates
PORT
DATA
DIRECTION
A
A1
A2
A3
A4
A5
A6
A7
A8
1
19
2
3
4
5
6
7
8
9
LOGIC DIAGRAM
PIN 10 = GND
PIN 20 = V CC
18
17
16
15
14
13
12
11
B1
B2
B3
B4
B5
B6
B7
B8
B
DATA
PORT
1
X = don’t care
Output
Enable
Control Inputs
H
L
L
Direction
REV 6
H
X
L
MC54/74HC245A
DIRECTION
20
20
FUNCTION TABLE
20
1
Data Transmitted from Bus B to Bus A
Data Transmitted from Bus A to Bus B
Buses Isolated (High–Impedance State)
1
GND
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXADW
ORDERING INFORMATION
A4
A1
A2
A3
A5
A6
A7
A8
1
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
9
10
Operation
Operation
CERAMIC PACKAGE
PLASTIC PACKAGE
20
19
18
17
16
15
14
13
12
11
SOIC PACKAGE
CASE 751D–04
CASE 732–03
CASE 738–03
DW SUFFIX
N SUFFIX
V CC
OUTPUT ENABLE
B1
B2
B3
B4
B5
B6
B7
B8
J SUFFIX
Ceramic
Plastic
SOIC

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MC54HC245AJ Summary of contents

Page 1

... In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 308 FETs or 77 Equivalent Gates LOGIC DIAGRAM DATA 6 A5 PORT DIRECTION 19 OUTPUT ENABLE PIN 10 = GND PIN 10/95 Motorola, Inc. 1995 MC54/74HC245A ORDERING INFORMATION MC54HCXXXAJ MC74HCXXXAN MC74HCXXXADW 18 B1 DIRECTION DATA 14 B5 PORT A4 ...

Page 2

... Current (per Package) Î Î Î Î Î Î Î Î Î Î Î Î Î NOTE: Information on typical parametric values and high frequency or heavy load considerations can be found in Chapter 2 of the Motorola High– Speed CMOS Data Book (DL129/D). MOTOROLA Î ...

Page 3

... NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High– Speed CMOS Data Book (DL129/D). ...

Page 4

... MC54/74HC245A DATA PORT DIRECTION 19 OUTPUT ENABLE MOTOROLA EXPANDED LOGIC DIAGRAM DATA PORT High–Speed CMOS Logic Data DL129 — Rev 6 ...

Page 5

... B 7.40 7.60 0.292 0.299 C 2.35 2.65 0.093 0.104 D 0.35 0.49 0.014 0.019 F 0.50 0.90 0.020 0.035 G 1.27 BSC 0.050 BSC J 0.25 0.32 0.010 0.012 K 0.10 0.25 0.004 0.009 10.05 10.55 0.395 0.415 R 0.25 0.75 0.010 0.029 MOTOROLA ...

Page 6

... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “ ...

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