ST24FC21B6 STMicroelectronics, ST24FC21B6 Datasheet
ST24FC21B6
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ST24FC21B6 Summary of contents
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ST24FC21, ST24FC21B, ST24FW21 1 MILLION ERASE/WRITE CYCLES 40 YEARS DATA RETENTION 3.6V to 5.5V or 2.5V to 5.5V SINGLE SUPPLY VOLTAGE HARDWARE WRITE CONTROL (ST24LW21 and ST24FW21) TTL SCHMITT-TRIGGER on VCLK INPUT 100k / 400k Hz COMPATIBILITY with the I ...
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ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 2A. DIP Pin Connections ST24LC21B AI01742 Warning Not Connected. Figure 2C. DIP Pin Connections ST24FC21 ST24FC21B ...
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... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not i m plied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. ...
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ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 3. Transmit Only Mode Waveforms V CC SCL SDA tVPU VCLK SCL SDA Bit 6 VCLK 2 Table Operating Modes ST24LC21B RW ST24FC21 Mode bit ST24FC21B Current Address ...
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Figure 4. Transition from Transmit Only (DDC1) to Bi-directional (DDC2B) Mode Waveforms Transmit Only Mode SCL SDA VCLK A byte is clocked out (on SDA pin) with nine clock pulses on VCLK: 8 clock pulses for the data byte and ...
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ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 5. Error Recovery Mechanism Flowchart for the ST24FC21, ST24FC21B and ST24FW21 products Internal Address Pointer = 0 NO VCLK Internal Counter = 0 Start Internal 2 sec Timer (START + Device Select) Transition State ...
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Figure 6. Maximum R Value versus Bus Capacitance ( When the ST24FC21 (or the ST24FC21B or the ST24FW21) first switches to the I DDC2B mode), it enters a transition state which is ...
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ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 (1) Table 5. Input Parameters Symbol C Input Capacitance (SDA Input Capacitance (other pins) IN Low-pass filter input time constant t LP (SDA and SCL) Note: 1. Sampled only, not 100% tested. Table ...
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Table 6B. DC Characteristics (ST24FC21B – 2.5 to 5.5V Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO Supply Current I CC Supply Current I Supply Current (Standby) ...
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ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Table 7. AC Characteristics – 3 Symbol Alt ( Clock Rise Time CH1CH2 R ( Clock Fall ...
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Table 8. AC Characteristics – 3.6V to 5.5V Symbol Alt t t Clock Rise Time CH1CH2 Clock Fall Time CL1CL2 Input Rise Time DH1DH2 ...
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ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 7. AC Waveforms SCL SDA IN START CONDITION SCL tCLQV SDA OUT tDHDL SCL SDA IN tCHDH STOP CONDITION VCLK SDA SCL 12/22 tCHCL tDLCL tCHDX tCLDX SDA SDA INPUT CHANGE tCLQX DATA VALID ...
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Table 10. AC Measurement Conditions Input Rise and Fall Times Input Pulse Voltages SDA, SCL Input Pulse Voltages V CLK Input and Output Timing Ref. Voltages 2 Figure Bus Protocol SCL SDA START CONDITION SCL MSB SDA ...
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ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 10. Write Cycle Polling using ACK First byte of instruction with already decoded by ST24xxx NO ReSTART STOP the SDA signal must be stable during the clock low to high transition ...
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Figure 11. Write Modes Sequence VCLK/WC BYTE WRITE VCLK/WC PAGE WRITE memory. The master then terminates the transfer by generating a STOP condition. Page Write. The Page Write mode allows bytes to be written in a single ...
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ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 12. Inhibited Write when VCLK/ VCLK/WC CONTROL BYTE WRITE CONTROL PAGE WRITE – Step 1: the Master issues a START condition followed by a Device Select byte (1st byte of the new ...
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Figure 13. Recommended Schematic for VESA 2.0 Specification +5V SCL SDA VSync HOST low during this time, the ST24xy21 terminate the data transfer and switches to a standby state. NOTE CONCERNING THE POWER SUPPLY VOLTAGE IN THE VESA 2.0 SPECIFICATION ...
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ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 14. Read Modes Sequence CURRENT ADDRESS READ RANDOM ADDRESS READ SEQUENTIAL CURRENT READ SEQUENTIAL RANDOM READ Note: * The 7 Most Significant bits of DEV SEL bytes of a Random Read (1st byte and ...
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... Devices are shipped from the factory with the memory content set at all "1’s" (FFh). For a list of available options (Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you. ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 ...
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ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 PSDIP8 - 8 pin Plastic Skinny DIP, 0.25mm lead frame Symb Typ 7. 2. PSDIP8 Drawing is not ...
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SO8 - 8 lead Plastic Small Outline, 150 mils body width Symb Typ 1. SO8 SO-a Drawing is not to scale. ST24LC21B, ST24LW21, ...
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... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics ...